18c2ecf20Sopenharmony_ciBindings for Analog Devices ADG792A/G Triple 4:1 Multiplexers 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciRequired properties: 48c2ecf20Sopenharmony_ci- compatible : "adi,adg792a" or "adi,adg792g" 58c2ecf20Sopenharmony_ci- #mux-control-cells : <0> if parallel (the three muxes are bound together 68c2ecf20Sopenharmony_ci with a single mux controller controlling all three muxes), or <1> if 78c2ecf20Sopenharmony_ci not (one mux controller for each mux). 88c2ecf20Sopenharmony_ci* Standard mux-controller bindings as described in mux-controller.txt 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ciOptional properties for ADG792G: 118c2ecf20Sopenharmony_ci- gpio-controller : if present, #gpio-cells below is required. 128c2ecf20Sopenharmony_ci- #gpio-cells : should be <2> 138c2ecf20Sopenharmony_ci - First cell is the GPO line number, i.e. 0 or 1 148c2ecf20Sopenharmony_ci - Second cell is used to specify active high (0) 158c2ecf20Sopenharmony_ci or active low (1) 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ciOptional properties: 188c2ecf20Sopenharmony_ci- idle-state : if present, array of states that the mux controllers will have 198c2ecf20Sopenharmony_ci when idle. The special state MUX_IDLE_AS_IS is the default and 208c2ecf20Sopenharmony_ci MUX_IDLE_DISCONNECT is also supported. 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ciStates 0 through 3 correspond to signals A through D in the datasheet. 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ciExample: 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci /* 278c2ecf20Sopenharmony_ci * Three independent mux controllers (of which one is used). 288c2ecf20Sopenharmony_ci * Mux 0 is disconnected when idle, mux 1 idles in the previously 298c2ecf20Sopenharmony_ci * selected state and mux 2 idles with signal B. 308c2ecf20Sopenharmony_ci */ 318c2ecf20Sopenharmony_ci &i2c0 { 328c2ecf20Sopenharmony_ci mux: mux-controller@50 { 338c2ecf20Sopenharmony_ci compatible = "adi,adg792a"; 348c2ecf20Sopenharmony_ci reg = <0x50>; 358c2ecf20Sopenharmony_ci #mux-control-cells = <1>; 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ci idle-state = <MUX_IDLE_DISCONNECT MUX_IDLE_AS_IS 1>; 388c2ecf20Sopenharmony_ci }; 398c2ecf20Sopenharmony_ci }; 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci adc-mux { 428c2ecf20Sopenharmony_ci compatible = "io-channel-mux"; 438c2ecf20Sopenharmony_ci io-channels = <&adc 0>; 448c2ecf20Sopenharmony_ci io-channel-names = "parent"; 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ci mux-controls = <&mux 2>; 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ci channels = "sync-1", "", "out"; 498c2ecf20Sopenharmony_ci }; 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_ci /* 538c2ecf20Sopenharmony_ci * Three parallel muxes with one mux controller, useful e.g. if 548c2ecf20Sopenharmony_ci * the adc is differential, thus needing two signals to be muxed 558c2ecf20Sopenharmony_ci * simultaneously for correct operation. 568c2ecf20Sopenharmony_ci */ 578c2ecf20Sopenharmony_ci &i2c0 { 588c2ecf20Sopenharmony_ci pmux: mux-controller@50 { 598c2ecf20Sopenharmony_ci compatible = "adi,adg792a"; 608c2ecf20Sopenharmony_ci reg = <0x50>; 618c2ecf20Sopenharmony_ci #mux-control-cells = <0>; 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ci idle-state = <1>; 648c2ecf20Sopenharmony_ci }; 658c2ecf20Sopenharmony_ci }; 668c2ecf20Sopenharmony_ci 678c2ecf20Sopenharmony_ci diff-adc-mux { 688c2ecf20Sopenharmony_ci compatible = "io-channel-mux"; 698c2ecf20Sopenharmony_ci io-channels = <&adc 0>; 708c2ecf20Sopenharmony_ci io-channel-names = "parent"; 718c2ecf20Sopenharmony_ci 728c2ecf20Sopenharmony_ci mux-controls = <&pmux>; 738c2ecf20Sopenharmony_ci 748c2ecf20Sopenharmony_ci channels = "sync-1", "", "out"; 758c2ecf20Sopenharmony_ci }; 76