18c2ecf20Sopenharmony_ci* Oxford Semiconductor OXNAS NAND Controller
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciPlease refer to nand-controller.yaml for generic information regarding MTD NAND bindings.
48c2ecf20Sopenharmony_ci
58c2ecf20Sopenharmony_ciRequired properties:
68c2ecf20Sopenharmony_ci - compatible: "oxsemi,ox820-nand"
78c2ecf20Sopenharmony_ci - reg: Base address and length for NAND mapped memory.
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_ciOptional Properties:
108c2ecf20Sopenharmony_ci - clocks: phandle to the NAND gate clock if needed.
118c2ecf20Sopenharmony_ci - resets: phandle to the NAND reset control if needed.
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ciExample:
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_cinandc: nand-controller@41000000 {
168c2ecf20Sopenharmony_ci	compatible = "oxsemi,ox820-nand";
178c2ecf20Sopenharmony_ci	reg = <0x41000000 0x100000>;
188c2ecf20Sopenharmony_ci	clocks = <&stdclk CLK_820_NAND>;
198c2ecf20Sopenharmony_ci	resets = <&reset RESET_NAND>;
208c2ecf20Sopenharmony_ci	#address-cells = <1>;
218c2ecf20Sopenharmony_ci	#size-cells = <0>;
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ci	nand@0 {
248c2ecf20Sopenharmony_ci		reg = <0>;
258c2ecf20Sopenharmony_ci		#address-cells = <1>;
268c2ecf20Sopenharmony_ci		#size-cells = <1>;
278c2ecf20Sopenharmony_ci		nand-ecc-mode = "soft";
288c2ecf20Sopenharmony_ci		nand-ecc-algo = "hamming";
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_ci		partition@0 {
318c2ecf20Sopenharmony_ci			label = "boot";
328c2ecf20Sopenharmony_ci			reg = <0x00000000 0x00e00000>;
338c2ecf20Sopenharmony_ci			read-only;
348c2ecf20Sopenharmony_ci		};
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_ci		partition@e00000 {
378c2ecf20Sopenharmony_ci			label = "ubi";
388c2ecf20Sopenharmony_ci			reg = <0x00e00000 0x07200000>;
398c2ecf20Sopenharmony_ci		};
408c2ecf20Sopenharmony_ci	};
418c2ecf20Sopenharmony_ci};
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