18c2ecf20Sopenharmony_ci* TI Highspeed MMC host controller for OMAP and 66AK2G family. 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThe Highspeed MMC Host Controller on TI OMAP and 66AK2G family 48c2ecf20Sopenharmony_ciprovides an interface for MMC, SD, and SDIO types of memory cards. 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ciThis file documents differences between the core properties described 78c2ecf20Sopenharmony_ciby mmc.txt and the properties used by the omap_hsmmc driver. 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ciRequired properties: 108c2ecf20Sopenharmony_ci-------------------- 118c2ecf20Sopenharmony_ci- compatible: 128c2ecf20Sopenharmony_ci Should be "ti,omap2-hsmmc", for OMAP2 controllers 138c2ecf20Sopenharmony_ci Should be "ti,omap3-hsmmc", for OMAP3 controllers 148c2ecf20Sopenharmony_ci Should be "ti,omap3-pre-es3-hsmmc" for OMAP3 controllers pre ES3.0 158c2ecf20Sopenharmony_ci Should be "ti,omap4-hsmmc", for OMAP4 controllers 168c2ecf20Sopenharmony_ci Should be "ti,am33xx-hsmmc", for AM335x controllers 178c2ecf20Sopenharmony_ci Should be "ti,k2g-hsmmc", "ti,omap4-hsmmc" for 66AK2G controllers. 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ciSoC specific required properties: 208c2ecf20Sopenharmony_ci--------------------------------- 218c2ecf20Sopenharmony_ciThe following are mandatory properties for OMAPs, AM33xx and AM43xx SoCs only: 228c2ecf20Sopenharmony_ci- ti,hwmods: Must be "mmc<n>", n is controller instance starting 1. 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ciThe following are mandatory properties for 66AK2G SoCs only: 258c2ecf20Sopenharmony_ci- power-domains:Should contain a phandle to a PM domain provider node 268c2ecf20Sopenharmony_ci and an args specifier containing the MMC device id 278c2ecf20Sopenharmony_ci value. This property is as per the binding, 288c2ecf20Sopenharmony_ci Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt 298c2ecf20Sopenharmony_ci- clocks: Must contain an entry for each entry in clock-names. Should 308c2ecf20Sopenharmony_ci be defined as per the he appropriate clock bindings consumer 318c2ecf20Sopenharmony_ci usage in Documentation/devicetree/bindings/clock/ti,sci-clk.txt 328c2ecf20Sopenharmony_ci- clock-names: Shall be "fck" for the functional clock, 338c2ecf20Sopenharmony_ci and "mmchsdb_fck" for the debounce clock. 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_ciOptional properties: 378c2ecf20Sopenharmony_ci-------------------- 388c2ecf20Sopenharmony_ci- ti,dual-volt: boolean, supports dual voltage cards 398c2ecf20Sopenharmony_ci- <supply-name>-supply: phandle to the regulator device tree node 408c2ecf20Sopenharmony_ci "supply-name" examples are "vmmc", 418c2ecf20Sopenharmony_ci "vmmc_aux"(deprecated)/"vqmmc" etc 428c2ecf20Sopenharmony_ci- ti,non-removable: non-removable slot (like eMMC) 438c2ecf20Sopenharmony_ci- ti,needs-special-reset: Requires a special softreset sequence 448c2ecf20Sopenharmony_ci- ti,needs-special-hs-handling: HSMMC IP needs special setting 458c2ecf20Sopenharmony_ci for handling High Speed 468c2ecf20Sopenharmony_ci- dmas: List of DMA specifiers with the controller specific 478c2ecf20Sopenharmony_ci format as described in the generic DMA client 488c2ecf20Sopenharmony_ci binding. A tx and rx specifier is required. 498c2ecf20Sopenharmony_ci- dma-names: List of DMA request names. These strings correspond 508c2ecf20Sopenharmony_ci 1:1 with the DMA specifiers listed in dmas. 518c2ecf20Sopenharmony_ci The string naming is to be "rx" and "tx" for 528c2ecf20Sopenharmony_ci RX and TX DMA requests, respectively. 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ciExamples: 558c2ecf20Sopenharmony_ci 568c2ecf20Sopenharmony_ci[hwmod populated DMA resources] 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_ci mmc1: mmc@4809c000 { 598c2ecf20Sopenharmony_ci compatible = "ti,omap4-hsmmc"; 608c2ecf20Sopenharmony_ci reg = <0x4809c000 0x400>; 618c2ecf20Sopenharmony_ci ti,hwmods = "mmc1"; 628c2ecf20Sopenharmony_ci ti,dual-volt; 638c2ecf20Sopenharmony_ci bus-width = <4>; 648c2ecf20Sopenharmony_ci vmmc-supply = <&vmmc>; /* phandle to regulator node */ 658c2ecf20Sopenharmony_ci ti,non-removable; 668c2ecf20Sopenharmony_ci }; 678c2ecf20Sopenharmony_ci 688c2ecf20Sopenharmony_ci[generic DMA request binding] 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_ci mmc1: mmc@4809c000 { 718c2ecf20Sopenharmony_ci compatible = "ti,omap4-hsmmc"; 728c2ecf20Sopenharmony_ci reg = <0x4809c000 0x400>; 738c2ecf20Sopenharmony_ci ti,hwmods = "mmc1"; 748c2ecf20Sopenharmony_ci ti,dual-volt; 758c2ecf20Sopenharmony_ci bus-width = <4>; 768c2ecf20Sopenharmony_ci vmmc-supply = <&vmmc>; /* phandle to regulator node */ 778c2ecf20Sopenharmony_ci ti,non-removable; 788c2ecf20Sopenharmony_ci dmas = <&edma 24 798c2ecf20Sopenharmony_ci &edma 25>; 808c2ecf20Sopenharmony_ci dma-names = "tx", "rx"; 818c2ecf20Sopenharmony_ci }; 828c2ecf20Sopenharmony_ci 838c2ecf20Sopenharmony_ci[workaround for missing swakeup on am33xx] 848c2ecf20Sopenharmony_ci 858c2ecf20Sopenharmony_ciThis SOC is missing the swakeup line, it will not detect SDIO irq 868c2ecf20Sopenharmony_ciwhile in suspend. 878c2ecf20Sopenharmony_ci 888c2ecf20Sopenharmony_ci ------ 898c2ecf20Sopenharmony_ci | PRCM | 908c2ecf20Sopenharmony_ci ------ 918c2ecf20Sopenharmony_ci ^ | 928c2ecf20Sopenharmony_ci swakeup | | fclk 938c2ecf20Sopenharmony_ci | v 948c2ecf20Sopenharmony_ci ------ ------- ----- 958c2ecf20Sopenharmony_ci | card | -- CIRQ --> | hsmmc | -- IRQ --> | CPU | 968c2ecf20Sopenharmony_ci ------ ------- ----- 978c2ecf20Sopenharmony_ci 988c2ecf20Sopenharmony_ciIn suspend the fclk is off and the module is disfunctional. Even register reads 998c2ecf20Sopenharmony_ciwill fail. A small logic in the host will request fclk restore, when an 1008c2ecf20Sopenharmony_ciexternal event is detected. Once the clock is restored, the host detects the 1018c2ecf20Sopenharmony_cievent normally. Since am33xx doesn't have this line it never wakes from 1028c2ecf20Sopenharmony_cisuspend. 1038c2ecf20Sopenharmony_ci 1048c2ecf20Sopenharmony_ciThe workaround is to reconfigure the dat1 line as a GPIO upon suspend. To make 1058c2ecf20Sopenharmony_cithis work, we need to set the named pinctrl states "default" and "idle". 1068c2ecf20Sopenharmony_ciPrepare idle to remux dat1 as a gpio, and default to remux it back as sdio 1078c2ecf20Sopenharmony_cidat1. The MMC driver will then toggle between idle and default state during 1088c2ecf20Sopenharmony_ciruntime. 1098c2ecf20Sopenharmony_ci 1108c2ecf20Sopenharmony_ciIn summary: 1118c2ecf20Sopenharmony_ci1. select matching 'compatible' section, see example below. 1128c2ecf20Sopenharmony_ci2. specify pinctrl states "default" and "idle", "sleep" is optional. 1138c2ecf20Sopenharmony_ci3. specify the gpio irq used for detecting sdio irq in suspend 1148c2ecf20Sopenharmony_ci 1158c2ecf20Sopenharmony_ciIf configuration is incomplete, a warning message is emitted "falling back to 1168c2ecf20Sopenharmony_cipolling". Also check the "sdio irq mode" in /sys/kernel/debug/mmc0/regs. Mind 1178c2ecf20Sopenharmony_cinot every application needs SDIO irq, e.g. MMC cards. 1188c2ecf20Sopenharmony_ci 1198c2ecf20Sopenharmony_ci mmc1: mmc@48060100 { 1208c2ecf20Sopenharmony_ci compatible = "ti,am33xx-hsmmc"; 1218c2ecf20Sopenharmony_ci ... 1228c2ecf20Sopenharmony_ci pinctrl-names = "default", "idle", "sleep" 1238c2ecf20Sopenharmony_ci pinctrl-0 = <&mmc1_pins>; 1248c2ecf20Sopenharmony_ci pinctrl-1 = <&mmc1_idle>; 1258c2ecf20Sopenharmony_ci pinctrl-2 = <&mmc1_sleep>; 1268c2ecf20Sopenharmony_ci ... 1278c2ecf20Sopenharmony_ci interrupts-extended = <&intc 64 &gpio2 28 IRQ_TYPE_LEVEL_LOW>; 1288c2ecf20Sopenharmony_ci }; 1298c2ecf20Sopenharmony_ci 1308c2ecf20Sopenharmony_ci mmc1_idle : pinmux_cirq_pin { 1318c2ecf20Sopenharmony_ci pinctrl-single,pins = < 1328c2ecf20Sopenharmony_ci 0x0f8 0x3f /* GPIO2_28 */ 1338c2ecf20Sopenharmony_ci >; 1348c2ecf20Sopenharmony_ci }; 135