18c2ecf20Sopenharmony_ci* Samsung's S3C24XX MMC/SD/SDIO controller device tree bindings
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciSamsung's S3C24XX MMC/SD/SDIO controller is used as a connectivity interface
48c2ecf20Sopenharmony_ciwith external MMC, SD and SDIO storage mediums.
58c2ecf20Sopenharmony_ci
68c2ecf20Sopenharmony_ciThis file documents differences between the core mmc properties described by
78c2ecf20Sopenharmony_cimmc.txt and the properties used by the Samsung S3C24XX MMC/SD/SDIO controller
88c2ecf20Sopenharmony_ciimplementation.
98c2ecf20Sopenharmony_ci
108c2ecf20Sopenharmony_ciRequired SoC Specific Properties:
118c2ecf20Sopenharmony_ci- compatible: should be one of the following
128c2ecf20Sopenharmony_ci  - "samsung,s3c2410-sdi": for controllers compatible with s3c2410
138c2ecf20Sopenharmony_ci  - "samsung,s3c2412-sdi": for controllers compatible with s3c2412
148c2ecf20Sopenharmony_ci  - "samsung,s3c2440-sdi": for controllers compatible with s3c2440
158c2ecf20Sopenharmony_ci- reg: register location and length
168c2ecf20Sopenharmony_ci- interrupts: mmc controller interrupt
178c2ecf20Sopenharmony_ci- clocks: Should reference the controller clock
188c2ecf20Sopenharmony_ci- clock-names: Should contain "sdi"
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ciRequired Board Specific Properties:
218c2ecf20Sopenharmony_ci- pinctrl-0: Should specify pin control groups used for this controller.
228c2ecf20Sopenharmony_ci- pinctrl-names: Should contain only one value - "default".
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_ciOptional Properties:
258c2ecf20Sopenharmony_ci- bus-width: number of data lines (see mmc.txt)
268c2ecf20Sopenharmony_ci- cd-gpios: gpio for card detection (see mmc.txt)
278c2ecf20Sopenharmony_ci- wp-gpios: gpio for write protection (see mmc.txt)
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_ciExample:
308c2ecf20Sopenharmony_ci
318c2ecf20Sopenharmony_ci	mmc0: mmc@5a000000 {
328c2ecf20Sopenharmony_ci		compatible = "samsung,s3c2440-sdi";
338c2ecf20Sopenharmony_ci		pinctrl-names = "default";
348c2ecf20Sopenharmony_ci		pinctrl-0 = <&sdi_pins>;
358c2ecf20Sopenharmony_ci		reg = <0x5a000000 0x100000>;
368c2ecf20Sopenharmony_ci		interrupts = <0 0 21 3>;
378c2ecf20Sopenharmony_ci		clocks = <&clocks PCLK_SDI>;
388c2ecf20Sopenharmony_ci		clock-names = "sdi";
398c2ecf20Sopenharmony_ci		bus-width = <4>;
408c2ecf20Sopenharmony_ci		cd-gpios = <&gpg 8 GPIO_ACTIVE_LOW>;
418c2ecf20Sopenharmony_ci		wp-gpios = <&gph 8 GPIO_ACTIVE_LOW>;
428c2ecf20Sopenharmony_ci	};
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