18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
28c2ecf20Sopenharmony_ci%YAML 1.2
38c2ecf20Sopenharmony_ci---
48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_cititle: Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_cimaintainers:
108c2ecf20Sopenharmony_ci  - Shawn Guo <shawnguo@kernel.org>
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_ciallOf:
138c2ecf20Sopenharmony_ci  - $ref: "mmc-controller.yaml"
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_cidescription: |
168c2ecf20Sopenharmony_ci  The Enhanced Secure Digital Host Controller on Freescale i.MX family
178c2ecf20Sopenharmony_ci  provides an interface for MMC, SD, and SDIO types of memory cards.
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ci  This file documents differences between the core properties described
208c2ecf20Sopenharmony_ci  by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_ciproperties:
238c2ecf20Sopenharmony_ci  compatible:
248c2ecf20Sopenharmony_ci    oneOf:
258c2ecf20Sopenharmony_ci      - enum:
268c2ecf20Sopenharmony_ci          - fsl,imx25-esdhc
278c2ecf20Sopenharmony_ci          - fsl,imx35-esdhc
288c2ecf20Sopenharmony_ci          - fsl,imx51-esdhc
298c2ecf20Sopenharmony_ci          - fsl,imx53-esdhc
308c2ecf20Sopenharmony_ci          - fsl,imx6q-usdhc
318c2ecf20Sopenharmony_ci          - fsl,imx6sl-usdhc
328c2ecf20Sopenharmony_ci          - fsl,imx6sx-usdhc
338c2ecf20Sopenharmony_ci          - fsl,imx6ull-usdhc
348c2ecf20Sopenharmony_ci          - fsl,imx7d-usdhc
358c2ecf20Sopenharmony_ci          - fsl,imx7ulp-usdhc
368c2ecf20Sopenharmony_ci      - items:
378c2ecf20Sopenharmony_ci          - enum:
388c2ecf20Sopenharmony_ci              - fsl,imx8mm-usdhc
398c2ecf20Sopenharmony_ci              - fsl,imx8mn-usdhc
408c2ecf20Sopenharmony_ci              - fsl,imx8mp-usdhc
418c2ecf20Sopenharmony_ci              - fsl,imx8mq-usdhc
428c2ecf20Sopenharmony_ci              - fsl,imx8qxp-usdhc
438c2ecf20Sopenharmony_ci          - const: fsl,imx7d-usdhc
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_ci  reg:
468c2ecf20Sopenharmony_ci    maxItems: 1
478c2ecf20Sopenharmony_ci
488c2ecf20Sopenharmony_ci  interrupts:
498c2ecf20Sopenharmony_ci    maxItems: 1
508c2ecf20Sopenharmony_ci
518c2ecf20Sopenharmony_ci  fsl,wp-controller:
528c2ecf20Sopenharmony_ci    description: |
538c2ecf20Sopenharmony_ci      boolean, if present, indicate to use controller internal write protection.
548c2ecf20Sopenharmony_ci    type: boolean
558c2ecf20Sopenharmony_ci
568c2ecf20Sopenharmony_ci  fsl,delay-line:
578c2ecf20Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/uint32
588c2ecf20Sopenharmony_ci    description: |
598c2ecf20Sopenharmony_ci      Specify the number of delay cells for override mode.
608c2ecf20Sopenharmony_ci      This is used to set the clock delay for DLL(Delay Line) on override mode
618c2ecf20Sopenharmony_ci      to select a proper data sampling window in case the clock quality is not good
628c2ecf20Sopenharmony_ci      due to signal path is too long on the board. Please refer to eSDHC/uSDHC
638c2ecf20Sopenharmony_ci      chapter, DLL (Delay Line) section in RM for details.
648c2ecf20Sopenharmony_ci    default: 0
658c2ecf20Sopenharmony_ci
668c2ecf20Sopenharmony_ci  voltage-ranges:
678c2ecf20Sopenharmony_ci    $ref: '/schemas/types.yaml#/definitions/uint32-matrix'
688c2ecf20Sopenharmony_ci    description: |
698c2ecf20Sopenharmony_ci      Specify the voltage range in case there are software transparent level
708c2ecf20Sopenharmony_ci      shifters on the outputs of the controller. Two cells are required, first
718c2ecf20Sopenharmony_ci      cell specifies minimum slot voltage (mV), second cell specifies maximum
728c2ecf20Sopenharmony_ci      slot voltage (mV).
738c2ecf20Sopenharmony_ci    items:
748c2ecf20Sopenharmony_ci      items:
758c2ecf20Sopenharmony_ci        - description: value for minimum slot voltage
768c2ecf20Sopenharmony_ci        - description: value for maximum slot voltage
778c2ecf20Sopenharmony_ci    maxItems: 1
788c2ecf20Sopenharmony_ci
798c2ecf20Sopenharmony_ci  fsl,tuning-start-tap:
808c2ecf20Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/uint32
818c2ecf20Sopenharmony_ci    description: |
828c2ecf20Sopenharmony_ci      Specify the start delay cell point when send first CMD19 in tuning procedure.
838c2ecf20Sopenharmony_ci    default: 0
848c2ecf20Sopenharmony_ci
858c2ecf20Sopenharmony_ci  fsl,tuning-step:
868c2ecf20Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/uint32
878c2ecf20Sopenharmony_ci    description: |
888c2ecf20Sopenharmony_ci      Specify the increasing delay cell steps in tuning procedure.
898c2ecf20Sopenharmony_ci      The uSDHC use one delay cell as default increasing step to do tuning process.
908c2ecf20Sopenharmony_ci      This property allows user to change the tuning step to more than one delay
918c2ecf20Sopenharmony_ci      cells which is useful for some special boards or cards when the default
928c2ecf20Sopenharmony_ci      tuning step can't find the proper delay window within limited tuning retries.
938c2ecf20Sopenharmony_ci    default: 0
948c2ecf20Sopenharmony_ci
958c2ecf20Sopenharmony_ci  fsl,strobe-dll-delay-target:
968c2ecf20Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/uint32
978c2ecf20Sopenharmony_ci    description: |
988c2ecf20Sopenharmony_ci      Specify the strobe dll control slave delay target.
998c2ecf20Sopenharmony_ci      This delay target programming host controller loopback read clock, and this
1008c2ecf20Sopenharmony_ci      property allows user to change the delay target for the strobe input read clock.
1018c2ecf20Sopenharmony_ci      If not use this property, driver default set the delay target to value 7.
1028c2ecf20Sopenharmony_ci      Only eMMC HS400 mode need to take care of this property.
1038c2ecf20Sopenharmony_ci    default: 0
1048c2ecf20Sopenharmony_ci
1058c2ecf20Sopenharmony_cirequired:
1068c2ecf20Sopenharmony_ci  - compatible
1078c2ecf20Sopenharmony_ci  - reg
1088c2ecf20Sopenharmony_ci  - interrupts
1098c2ecf20Sopenharmony_ci
1108c2ecf20Sopenharmony_ciunevaluatedProperties: false
1118c2ecf20Sopenharmony_ci
1128c2ecf20Sopenharmony_ciexamples:
1138c2ecf20Sopenharmony_ci  - |
1148c2ecf20Sopenharmony_ci    mmc@70004000 {
1158c2ecf20Sopenharmony_ci        compatible = "fsl,imx51-esdhc";
1168c2ecf20Sopenharmony_ci        reg = <0x70004000 0x4000>;
1178c2ecf20Sopenharmony_ci        interrupts = <1>;
1188c2ecf20Sopenharmony_ci        fsl,wp-controller;
1198c2ecf20Sopenharmony_ci    };
1208c2ecf20Sopenharmony_ci
1218c2ecf20Sopenharmony_ci    mmc@70008000 {
1228c2ecf20Sopenharmony_ci        compatible = "fsl,imx51-esdhc";
1238c2ecf20Sopenharmony_ci        reg = <0x70008000 0x4000>;
1248c2ecf20Sopenharmony_ci        interrupts = <2>;
1258c2ecf20Sopenharmony_ci        cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */
1268c2ecf20Sopenharmony_ci        wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */
1278c2ecf20Sopenharmony_ci    };
128