18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-or-later
28c2ecf20Sopenharmony_ci# Copyright 2019 IBM Corp.
38c2ecf20Sopenharmony_ci%YAML 1.2
48c2ecf20Sopenharmony_ci---
58c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/mmc/aspeed,sdhci.yaml#
68c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
78c2ecf20Sopenharmony_ci
88c2ecf20Sopenharmony_cititle: ASPEED SD/SDIO/MMC Controller
98c2ecf20Sopenharmony_ci
108c2ecf20Sopenharmony_cimaintainers:
118c2ecf20Sopenharmony_ci  - Andrew Jeffery <andrew@aj.id.au>
128c2ecf20Sopenharmony_ci  - Ryan Chen <ryanchen.aspeed@gmail.com>
138c2ecf20Sopenharmony_ci
148c2ecf20Sopenharmony_cidescription: |+
158c2ecf20Sopenharmony_ci  The ASPEED SD/SDIO/eMMC controller exposes two slots implementing the SDIO
168c2ecf20Sopenharmony_ci  Host Specification v2.00, with 1 or 4 bit data buses, or an 8 bit data bus if
178c2ecf20Sopenharmony_ci  only a single slot is enabled.
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ci  The two slots are supported by a common configuration area. As the SDHCIs for
208c2ecf20Sopenharmony_ci  the slots are dependent on the common configuration area, they are described
218c2ecf20Sopenharmony_ci  as child nodes.
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ciproperties:
248c2ecf20Sopenharmony_ci  compatible:
258c2ecf20Sopenharmony_ci    enum:
268c2ecf20Sopenharmony_ci      - aspeed,ast2400-sd-controller
278c2ecf20Sopenharmony_ci      - aspeed,ast2500-sd-controller
288c2ecf20Sopenharmony_ci      - aspeed,ast2600-sd-controller
298c2ecf20Sopenharmony_ci  reg:
308c2ecf20Sopenharmony_ci    maxItems: 1
318c2ecf20Sopenharmony_ci    description: Common configuration registers
328c2ecf20Sopenharmony_ci  "#address-cells":
338c2ecf20Sopenharmony_ci    const: 1
348c2ecf20Sopenharmony_ci  "#size-cells":
358c2ecf20Sopenharmony_ci    const: 1
368c2ecf20Sopenharmony_ci  ranges: true
378c2ecf20Sopenharmony_ci  clocks:
388c2ecf20Sopenharmony_ci    maxItems: 1
398c2ecf20Sopenharmony_ci    description: The SD/SDIO controller clock gate
408c2ecf20Sopenharmony_ci
418c2ecf20Sopenharmony_cipatternProperties:
428c2ecf20Sopenharmony_ci  "^sdhci@[0-9a-f]+$":
438c2ecf20Sopenharmony_ci    type: object
448c2ecf20Sopenharmony_ci    $ref: mmc-controller.yaml
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_ci    properties:
478c2ecf20Sopenharmony_ci      compatible:
488c2ecf20Sopenharmony_ci        enum:
498c2ecf20Sopenharmony_ci          - aspeed,ast2400-sdhci
508c2ecf20Sopenharmony_ci          - aspeed,ast2500-sdhci
518c2ecf20Sopenharmony_ci          - aspeed,ast2600-sdhci
528c2ecf20Sopenharmony_ci      reg:
538c2ecf20Sopenharmony_ci        maxItems: 1
548c2ecf20Sopenharmony_ci        description: The SDHCI registers
558c2ecf20Sopenharmony_ci      clocks:
568c2ecf20Sopenharmony_ci        maxItems: 1
578c2ecf20Sopenharmony_ci        description: The SD bus clock
588c2ecf20Sopenharmony_ci      interrupts:
598c2ecf20Sopenharmony_ci        maxItems: 1
608c2ecf20Sopenharmony_ci        description: The SD interrupt shared between both slots
618c2ecf20Sopenharmony_ci      sdhci,auto-cmd12:
628c2ecf20Sopenharmony_ci        type: boolean
638c2ecf20Sopenharmony_ci        description: Specifies that controller should use auto CMD12
648c2ecf20Sopenharmony_ci    required:
658c2ecf20Sopenharmony_ci      - compatible
668c2ecf20Sopenharmony_ci      - reg
678c2ecf20Sopenharmony_ci      - clocks
688c2ecf20Sopenharmony_ci      - interrupts
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_ciadditionalProperties: false
718c2ecf20Sopenharmony_ci
728c2ecf20Sopenharmony_cirequired:
738c2ecf20Sopenharmony_ci  - compatible
748c2ecf20Sopenharmony_ci  - reg
758c2ecf20Sopenharmony_ci  - "#address-cells"
768c2ecf20Sopenharmony_ci  - "#size-cells"
778c2ecf20Sopenharmony_ci  - ranges
788c2ecf20Sopenharmony_ci  - clocks
798c2ecf20Sopenharmony_ci
808c2ecf20Sopenharmony_ciexamples:
818c2ecf20Sopenharmony_ci  - |
828c2ecf20Sopenharmony_ci    #include <dt-bindings/clock/aspeed-clock.h>
838c2ecf20Sopenharmony_ci    sdc@1e740000 {
848c2ecf20Sopenharmony_ci            compatible = "aspeed,ast2500-sd-controller";
858c2ecf20Sopenharmony_ci            reg = <0x1e740000 0x100>;
868c2ecf20Sopenharmony_ci            #address-cells = <1>;
878c2ecf20Sopenharmony_ci            #size-cells = <1>;
888c2ecf20Sopenharmony_ci            ranges = <0 0x1e740000 0x20000>;
898c2ecf20Sopenharmony_ci            clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
908c2ecf20Sopenharmony_ci
918c2ecf20Sopenharmony_ci            sdhci0: sdhci@100 {
928c2ecf20Sopenharmony_ci                    compatible = "aspeed,ast2500-sdhci";
938c2ecf20Sopenharmony_ci                    reg = <0x100 0x100>;
948c2ecf20Sopenharmony_ci                    interrupts = <26>;
958c2ecf20Sopenharmony_ci                    sdhci,auto-cmd12;
968c2ecf20Sopenharmony_ci                    clocks = <&syscon ASPEED_CLK_SDIO>;
978c2ecf20Sopenharmony_ci            };
988c2ecf20Sopenharmony_ci
998c2ecf20Sopenharmony_ci            sdhci1: sdhci@200 {
1008c2ecf20Sopenharmony_ci                    compatible = "aspeed,ast2500-sdhci";
1018c2ecf20Sopenharmony_ci                    reg = <0x200 0x100>;
1028c2ecf20Sopenharmony_ci                    interrupts = <26>;
1038c2ecf20Sopenharmony_ci                    sdhci,auto-cmd12;
1048c2ecf20Sopenharmony_ci                    clocks = <&syscon ASPEED_CLK_SDIO>;
1058c2ecf20Sopenharmony_ci            };
1068c2ecf20Sopenharmony_ci    };
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