18c2ecf20Sopenharmony_ci* QEMU PVPANIC MMIO Configuration bindings
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciQEMU's emulation / virtualization targets provide the following PVPANIC
48c2ecf20Sopenharmony_ciMMIO Configuration interface on the "virt" machine.
58c2ecf20Sopenharmony_citype:
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_ci- a read-write, 16-bit wide data register.
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_ciQEMU exposes the data register to guests as memory mapped registers.
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ciRequired properties:
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ci- compatible: "qemu,pvpanic-mmio".
148c2ecf20Sopenharmony_ci- reg: the MMIO region used by the device.
158c2ecf20Sopenharmony_ci  * Bytes 0x0  Write panic event to the reg when guest OS panics.
168c2ecf20Sopenharmony_ci  * Bytes 0x1  Reserved.
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ciExample:
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ci/ {
218c2ecf20Sopenharmony_ci        #size-cells = <0x2>;
228c2ecf20Sopenharmony_ci        #address-cells = <0x2>;
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_ci        pvpanic-mmio@9060000 {
258c2ecf20Sopenharmony_ci                compatible = "qemu,pvpanic-mmio";
268c2ecf20Sopenharmony_ci                reg = <0x0 0x9060000 0x0 0x2>;
278c2ecf20Sopenharmony_ci        };
288c2ecf20Sopenharmony_ci};
298c2ecf20Sopenharmony_ci
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