18c2ecf20Sopenharmony_ciMAX77620 Power management IC from Maxim Semiconductor.
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciRequired properties:
48c2ecf20Sopenharmony_ci-------------------
58c2ecf20Sopenharmony_ci- compatible: Must be one of
68c2ecf20Sopenharmony_ci		"maxim,max77620"
78c2ecf20Sopenharmony_ci		"maxim,max20024"
88c2ecf20Sopenharmony_ci		"maxim,max77663"
98c2ecf20Sopenharmony_ci- reg: I2C device address.
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ciOptional properties:
128c2ecf20Sopenharmony_ci-------------------
138c2ecf20Sopenharmony_ci- interrupts:		The interrupt on the parent the controller is
148c2ecf20Sopenharmony_ci			connected to.
158c2ecf20Sopenharmony_ci- interrupt-controller: Marks the device node as an interrupt controller.
168c2ecf20Sopenharmony_ci- #interrupt-cells:	is <2> and their usage is compliant to the 2 cells
178c2ecf20Sopenharmony_ci			variant of <../interrupt-controller/interrupts.txt>
188c2ecf20Sopenharmony_ci			IRQ numbers for different interrupt source of MAX77620
198c2ecf20Sopenharmony_ci			are defined at dt-bindings/mfd/max77620.h.
208c2ecf20Sopenharmony_ci
218c2ecf20Sopenharmony_ci- system-power-controller: Indicates that this PMIC is controlling the
228c2ecf20Sopenharmony_ci			   system power, see [1] for more details.
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_ci[1] Documentation/devicetree/bindings/power/power-controller.txt
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ciOptional subnodes and their properties:
278c2ecf20Sopenharmony_ci=======================================
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_ciFlexible power sequence configurations:
308c2ecf20Sopenharmony_ci--------------------------------------
318c2ecf20Sopenharmony_ciThe Flexible Power Sequencer (FPS) allows each regulator to power up under
328c2ecf20Sopenharmony_cihardware or software control. Additionally, each regulator can power on
338c2ecf20Sopenharmony_ciindependently or among a group of other regulators with an adjustable power-up
348c2ecf20Sopenharmony_ciand power-down delays (sequencing). GPIO1, GPIO2, and GPIO3 can be programmed
358c2ecf20Sopenharmony_cito be part of a sequence allowing external regulators to be sequenced along
368c2ecf20Sopenharmony_ciwith internal regulators. 32KHz clock can be programmed to be part of a
378c2ecf20Sopenharmony_cisequence.
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_ciThe flexible sequencing structure consists of two hardware enable inputs
408c2ecf20Sopenharmony_ci(EN0, EN1), and 3 master sequencing timers called FPS0, FPS1 and FPS2.
418c2ecf20Sopenharmony_ciEach master sequencing timer is programmable through its configuration
428c2ecf20Sopenharmony_ciregister to have a hardware enable source (EN1 or EN2) or a software enable
438c2ecf20Sopenharmony_cisource (SW). When enabled/disabled, the master sequencing timer generates
448c2ecf20Sopenharmony_cieight sequencing events on different time periods called slots. The time
458c2ecf20Sopenharmony_ciperiod between each event is programmable within the configuration register.
468c2ecf20Sopenharmony_ciEach regulator, GPIO1, GPIO2, GPIO3, and 32KHz clock has a flexible power
478c2ecf20Sopenharmony_cisequence slave register which allows its enable source to be specified as
488c2ecf20Sopenharmony_cia flexible power sequencer timer or a software bit. When a FPS source of
498c2ecf20Sopenharmony_ciregulators, GPIOs and clocks specifies the enable source to be a flexible
508c2ecf20Sopenharmony_cipower sequencer, the power up and power down delays can be specified in
518c2ecf20Sopenharmony_cithe regulators, GPIOs and clocks flexible power sequencer configuration
528c2ecf20Sopenharmony_ciregisters.
538c2ecf20Sopenharmony_ci
548c2ecf20Sopenharmony_ciWhen FPS event cleared (set to LOW), regulators, GPIOs and 32KHz
558c2ecf20Sopenharmony_ciclock are set into following state at the sequencing event that
568c2ecf20Sopenharmony_cicorresponds to its flexible sequencer configuration register.
578c2ecf20Sopenharmony_ci	Sleep state: 			In this state, regulators, GPIOs
588c2ecf20Sopenharmony_ci					and 32KHz clock get disabled at
598c2ecf20Sopenharmony_ci					the sequencing event.
608c2ecf20Sopenharmony_ci	Global Low Power Mode (GLPM):	In this state, regulators are set in
618c2ecf20Sopenharmony_ci					low power mode at the sequencing event.
628c2ecf20Sopenharmony_ci
638c2ecf20Sopenharmony_ciThe configuration parameters of FPS is provided through sub-node "fps"
648c2ecf20Sopenharmony_ciand their child for FPS specific. The child node name for FPS are "fps0",
658c2ecf20Sopenharmony_ci"fps1", and "fps2" for FPS0, FPS1 and FPS2 respectively.
668c2ecf20Sopenharmony_ci
678c2ecf20Sopenharmony_ciThe FPS configurations like FPS source, power up and power down slots for
688c2ecf20Sopenharmony_ciregulators, GPIOs and 32kHz clocks are provided in their respective
698c2ecf20Sopenharmony_ciconfiguration nodes which is explained in respective sub-system DT
708c2ecf20Sopenharmony_cibinding document.
718c2ecf20Sopenharmony_ci
728c2ecf20Sopenharmony_ciThere is need for different FPS configuration parameters based on system
738c2ecf20Sopenharmony_cistate like when system state changed from active to suspend or active to
748c2ecf20Sopenharmony_cipower off (shutdown).
758c2ecf20Sopenharmony_ci
768c2ecf20Sopenharmony_ciOptional properties:
778c2ecf20Sopenharmony_ci-------------------
788c2ecf20Sopenharmony_ci-maxim,fps-event-source:		u32, FPS event source like external
798c2ecf20Sopenharmony_ci					hardware input to PMIC i.e. EN0, EN1 or
808c2ecf20Sopenharmony_ci					software (SW).
818c2ecf20Sopenharmony_ci					The macros are defined on
828c2ecf20Sopenharmony_ci						dt-bindings/mfd/max77620.h
838c2ecf20Sopenharmony_ci					for different control source.
848c2ecf20Sopenharmony_ci					- MAX77620_FPS_EVENT_SRC_EN0
858c2ecf20Sopenharmony_ci						for hardware input pin EN0.
868c2ecf20Sopenharmony_ci					- MAX77620_FPS_EVENT_SRC_EN1
878c2ecf20Sopenharmony_ci						for hardware input pin EN1.
888c2ecf20Sopenharmony_ci					- MAX77620_FPS_EVENT_SRC_SW
898c2ecf20Sopenharmony_ci						for software control.
908c2ecf20Sopenharmony_ci
918c2ecf20Sopenharmony_ci-maxim,shutdown-fps-time-period-us:	u32, FPS time period in microseconds
928c2ecf20Sopenharmony_ci					when system enters in to shutdown
938c2ecf20Sopenharmony_ci					state.
948c2ecf20Sopenharmony_ci
958c2ecf20Sopenharmony_ci-maxim,suspend-fps-time-period-us:	u32, FPS time period in microseconds
968c2ecf20Sopenharmony_ci					when system enters in to suspend state.
978c2ecf20Sopenharmony_ci
988c2ecf20Sopenharmony_ci-maxim,device-state-on-disabled-event:	u32, describe the PMIC state when FPS
998c2ecf20Sopenharmony_ci					event cleared (set to LOW) whether it
1008c2ecf20Sopenharmony_ci					should go to sleep state or low-power
1018c2ecf20Sopenharmony_ci					state. Following are valid values:
1028c2ecf20Sopenharmony_ci					- MAX77620_FPS_INACTIVE_STATE_SLEEP
1038c2ecf20Sopenharmony_ci						to set the PMIC state to sleep.
1048c2ecf20Sopenharmony_ci					- MAX77620_FPS_INACTIVE_STATE_LOW_POWER
1058c2ecf20Sopenharmony_ci						to set the PMIC state to low
1068c2ecf20Sopenharmony_ci						power.
1078c2ecf20Sopenharmony_ci					Absence of this property or other value
1088c2ecf20Sopenharmony_ci					will not change device state when FPS
1098c2ecf20Sopenharmony_ci					event get cleared.
1108c2ecf20Sopenharmony_ci
1118c2ecf20Sopenharmony_ciHere supported time periods by device in microseconds are as follows:
1128c2ecf20Sopenharmony_ciMAX77620 supports 40, 80, 160, 320, 640, 1280, 2560 and 5120 microseconds.
1138c2ecf20Sopenharmony_ciMAX20024 supports 20, 40, 80, 160, 320, 640, 1280 and 2540 microseconds.
1148c2ecf20Sopenharmony_ciMAX77663 supports 20, 40, 80, 160, 320, 640, 1280 and 2540 microseconds.
1158c2ecf20Sopenharmony_ci
1168c2ecf20Sopenharmony_ci-maxim,power-ok-control: configure map power ok bit
1178c2ecf20Sopenharmony_ci			1: Enables POK(Power OK) to control nRST_IO and GPIO1
1188c2ecf20Sopenharmony_ci			POK function.
1198c2ecf20Sopenharmony_ci			0: Disables POK control.
1208c2ecf20Sopenharmony_ci			if property missing, do not configure MPOK bit.
1218c2ecf20Sopenharmony_ci			If POK mapping is enabled for GPIO1/nRST_IO then,
1228c2ecf20Sopenharmony_ci			GPIO1/nRST_IO pins are HIGH only if all rails
1238c2ecf20Sopenharmony_ci			that have POK control enabled are HIGH.
1248c2ecf20Sopenharmony_ci			If any of the rails goes down(which are enabled for POK
1258c2ecf20Sopenharmony_ci			control) then, GPIO1/nRST_IO goes LOW.
1268c2ecf20Sopenharmony_ci			this property is valid for max20024 only.
1278c2ecf20Sopenharmony_ci
1288c2ecf20Sopenharmony_ciFor DT binding details of different sub modules like GPIO, pincontrol,
1298c2ecf20Sopenharmony_ciregulator, power, please refer respective device-tree binding document
1308c2ecf20Sopenharmony_ciunder their respective sub-system directories.
1318c2ecf20Sopenharmony_ci
1328c2ecf20Sopenharmony_ciExample:
1338c2ecf20Sopenharmony_ci--------
1348c2ecf20Sopenharmony_ci#include <dt-bindings/mfd/max77620.h>
1358c2ecf20Sopenharmony_ci
1368c2ecf20Sopenharmony_cimax77620@3c {
1378c2ecf20Sopenharmony_ci	compatible = "maxim,max77620";
1388c2ecf20Sopenharmony_ci	reg = <0x3c>;
1398c2ecf20Sopenharmony_ci
1408c2ecf20Sopenharmony_ci	interrupt-parent = <&intc>;
1418c2ecf20Sopenharmony_ci	interrupts = <0 86 IRQ_TYPE_NONE>;
1428c2ecf20Sopenharmony_ci
1438c2ecf20Sopenharmony_ci	interrupt-controller;
1448c2ecf20Sopenharmony_ci	#interrupt-cells = <2>;
1458c2ecf20Sopenharmony_ci
1468c2ecf20Sopenharmony_ci	fps {
1478c2ecf20Sopenharmony_ci		fps0 {
1488c2ecf20Sopenharmony_ci			maxim,shutdown-fps-time-period-us = <1280>;
1498c2ecf20Sopenharmony_ci			maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
1508c2ecf20Sopenharmony_ci		};
1518c2ecf20Sopenharmony_ci
1528c2ecf20Sopenharmony_ci		fps1 {
1538c2ecf20Sopenharmony_ci			maxim,shutdown-fps-time-period-us = <1280>;
1548c2ecf20Sopenharmony_ci			maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
1558c2ecf20Sopenharmony_ci		};
1568c2ecf20Sopenharmony_ci
1578c2ecf20Sopenharmony_ci		fps2 {
1588c2ecf20Sopenharmony_ci			maxim,shutdown-fps-time-period-us = <1280>;
1598c2ecf20Sopenharmony_ci			maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_SW>;
1608c2ecf20Sopenharmony_ci		};
1618c2ecf20Sopenharmony_ci	};
1628c2ecf20Sopenharmony_ci};
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