18c2ecf20Sopenharmony_ciHisilicon Hi655x Power Management Integrated Circuit (PMIC) 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThe hardware layout for access PMIC Hi655x from AP SoC Hi6220. 48c2ecf20Sopenharmony_ciBetween PMIC Hi655x and Hi6220, the physical signal channel is SSI. 58c2ecf20Sopenharmony_ciWe can use memory-mapped I/O to communicate. 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci+----------------+ +-------------+ 88c2ecf20Sopenharmony_ci| | | | 98c2ecf20Sopenharmony_ci| Hi6220 | SSI bus | Hi655x | 108c2ecf20Sopenharmony_ci| |-------------| | 118c2ecf20Sopenharmony_ci| |(REGMAP_MMIO)| | 128c2ecf20Sopenharmony_ci+----------------+ +-------------+ 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ciRequired properties: 158c2ecf20Sopenharmony_ci- compatible: Should be "hisilicon,hi655x-pmic". 168c2ecf20Sopenharmony_ci- reg: Base address of PMIC on Hi6220 SoC. 178c2ecf20Sopenharmony_ci- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain). 188c2ecf20Sopenharmony_ci- pmic-gpios: The GPIO used by PMIC IRQ. 198c2ecf20Sopenharmony_ci- #clock-cells: From common clock binding; shall be set to 0 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ciOptional properties: 228c2ecf20Sopenharmony_ci- clock-output-names: From common clock binding to override the 238c2ecf20Sopenharmony_ci default output clock name 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ciExample: 268c2ecf20Sopenharmony_ci pmic: pmic@f8000000 { 278c2ecf20Sopenharmony_ci compatible = "hisilicon,hi655x-pmic"; 288c2ecf20Sopenharmony_ci reg = <0x0 0xf8000000 0x0 0x1000>; 298c2ecf20Sopenharmony_ci interrupt-controller; 308c2ecf20Sopenharmony_ci #interrupt-cells = <2>; 318c2ecf20Sopenharmony_ci pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 328c2ecf20Sopenharmony_ci #clock-cells = <0>; 338c2ecf20Sopenharmony_ci } 34