18c2ecf20Sopenharmony_ci* Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciRequired properties for USART:
48c2ecf20Sopenharmony_ci- compatible: Should be one of the following:
58c2ecf20Sopenharmony_ci	- "atmel,at91rm9200-usart"
68c2ecf20Sopenharmony_ci	- "atmel,at91sam9260-usart"
78c2ecf20Sopenharmony_ci	- "microchip,sam9x60-usart"
88c2ecf20Sopenharmony_ci	- "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart"
98c2ecf20Sopenharmony_ci	- "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"
108c2ecf20Sopenharmony_ci	- "microchip,sam9x60-dbgu", "microchip,sam9x60-usart"
118c2ecf20Sopenharmony_ci- reg: Should contain registers location and length
128c2ecf20Sopenharmony_ci- interrupts: Should contain interrupt
138c2ecf20Sopenharmony_ci- clock-names: tuple listing input clock names.
148c2ecf20Sopenharmony_ci	Required elements: "usart"
158c2ecf20Sopenharmony_ci- clocks: phandles to input clocks.
168c2ecf20Sopenharmony_ci
178c2ecf20Sopenharmony_ciRequired properties for USART in SPI mode:
188c2ecf20Sopenharmony_ci- #size-cells      : Must be <0>
198c2ecf20Sopenharmony_ci- #address-cells   : Must be <1>
208c2ecf20Sopenharmony_ci- cs-gpios: chipselects (internal cs not supported)
218c2ecf20Sopenharmony_ci- atmel,usart-mode : Must be <AT91_USART_MODE_SPI> (found in dt-bindings/mfd/at91-usart.h)
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ciOptional properties in serial and SPI mode:
248c2ecf20Sopenharmony_ci- dma bindings for dma transfer:
258c2ecf20Sopenharmony_ci	- dmas: DMA specifier, consisting of a phandle to DMA controller node,
268c2ecf20Sopenharmony_ci		memory peripheral interface and USART DMA channel ID, FIFO configuration.
278c2ecf20Sopenharmony_ci		The order of DMA channels is fixed. The first DMA channel must be TX
288c2ecf20Sopenharmony_ci		associated channel and the second one must be RX associated channel.
298c2ecf20Sopenharmony_ci		Refer to dma.txt and atmel-dma.txt for details.
308c2ecf20Sopenharmony_ci	- dma-names: "tx" for TX channel.
318c2ecf20Sopenharmony_ci		     "rx" for RX channel.
328c2ecf20Sopenharmony_ci		     The order of dma-names is also fixed. The first name must be "tx"
338c2ecf20Sopenharmony_ci		     and the second one must be "rx" as in the examples below.
348c2ecf20Sopenharmony_ci
358c2ecf20Sopenharmony_ciOptional properties in serial mode:
368c2ecf20Sopenharmony_ci- atmel,use-dma-rx: use of PDC or DMA for receiving data
378c2ecf20Sopenharmony_ci- atmel,use-dma-tx: use of PDC or DMA for transmitting data
388c2ecf20Sopenharmony_ci- {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD line respectively.
398c2ecf20Sopenharmony_ci  It will use specified PIO instead of the peripheral function pin for the USART feature.
408c2ecf20Sopenharmony_ci  If unsure, don't specify this property.
418c2ecf20Sopenharmony_ci- atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO
428c2ecf20Sopenharmony_ci  capable USARTs.
438c2ecf20Sopenharmony_ci- rs485-rts-delay, rs485-rx-during-tx, linux,rs485-enabled-at-boot-time: see rs485.txt
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_ci<chip> compatible description:
468c2ecf20Sopenharmony_ci- at91rm9200:  legacy USART support
478c2ecf20Sopenharmony_ci- at91sam9260: generic USART implementation for SAM9 SoCs
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_ciExample:
508c2ecf20Sopenharmony_ci- use PDC:
518c2ecf20Sopenharmony_ci	usart0: serial@fff8c000 {
528c2ecf20Sopenharmony_ci		compatible = "atmel,at91sam9260-usart";
538c2ecf20Sopenharmony_ci		reg = <0xfff8c000 0x4000>;
548c2ecf20Sopenharmony_ci		interrupts = <7>;
558c2ecf20Sopenharmony_ci		clocks = <&usart0_clk>;
568c2ecf20Sopenharmony_ci		clock-names = "usart";
578c2ecf20Sopenharmony_ci		atmel,use-dma-rx;
588c2ecf20Sopenharmony_ci		atmel,use-dma-tx;
598c2ecf20Sopenharmony_ci		rts-gpios = <&pioD 15 GPIO_ACTIVE_LOW>;
608c2ecf20Sopenharmony_ci		cts-gpios = <&pioD 16 GPIO_ACTIVE_LOW>;
618c2ecf20Sopenharmony_ci		dtr-gpios = <&pioD 17 GPIO_ACTIVE_LOW>;
628c2ecf20Sopenharmony_ci		dsr-gpios = <&pioD 18 GPIO_ACTIVE_LOW>;
638c2ecf20Sopenharmony_ci		dcd-gpios = <&pioD 20 GPIO_ACTIVE_LOW>;
648c2ecf20Sopenharmony_ci		rng-gpios = <&pioD 19 GPIO_ACTIVE_LOW>;
658c2ecf20Sopenharmony_ci	};
668c2ecf20Sopenharmony_ci
678c2ecf20Sopenharmony_ci- use DMA:
688c2ecf20Sopenharmony_ci	usart0: serial@f001c000 {
698c2ecf20Sopenharmony_ci		compatible = "atmel,at91sam9260-usart";
708c2ecf20Sopenharmony_ci		reg = <0xf001c000 0x100>;
718c2ecf20Sopenharmony_ci		interrupts = <12 4 5>;
728c2ecf20Sopenharmony_ci		clocks = <&usart0_clk>;
738c2ecf20Sopenharmony_ci		clock-names = "usart";
748c2ecf20Sopenharmony_ci		atmel,use-dma-rx;
758c2ecf20Sopenharmony_ci		atmel,use-dma-tx;
768c2ecf20Sopenharmony_ci		dmas = <&dma0 2 0x3>,
778c2ecf20Sopenharmony_ci		       <&dma0 2 0x204>;
788c2ecf20Sopenharmony_ci		dma-names = "tx", "rx";
798c2ecf20Sopenharmony_ci		atmel,fifo-size = <32>;
808c2ecf20Sopenharmony_ci	};
818c2ecf20Sopenharmony_ci
828c2ecf20Sopenharmony_ci- SPI mode:
838c2ecf20Sopenharmony_ci	#include <dt-bindings/mfd/at91-usart.h>
848c2ecf20Sopenharmony_ci
858c2ecf20Sopenharmony_ci	spi0: spi@f001c000 {
868c2ecf20Sopenharmony_ci		#address-cells = <1>;
878c2ecf20Sopenharmony_ci		#size-cells = <0>;
888c2ecf20Sopenharmony_ci		compatible = "atmel,at91rm9200-usart", "atmel,at91sam9260-usart";
898c2ecf20Sopenharmony_ci		atmel,usart-mode = <AT91_USART_MODE_SPI>;
908c2ecf20Sopenharmony_ci		reg = <0xf001c000 0x100>;
918c2ecf20Sopenharmony_ci		interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
928c2ecf20Sopenharmony_ci		clocks = <&usart0_clk>;
938c2ecf20Sopenharmony_ci		clock-names = "usart";
948c2ecf20Sopenharmony_ci		dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
958c2ecf20Sopenharmony_ci		       <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
968c2ecf20Sopenharmony_ci		dma-names = "tx", "rx";
978c2ecf20Sopenharmony_ci		cs-gpios = <&pioB 3 0>;
988c2ecf20Sopenharmony_ci	};
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