18c2ecf20Sopenharmony_ciDevice-Tree bindings for Atmel's HLCDC (High LCD Controller) MFD driver 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciRequired properties: 48c2ecf20Sopenharmony_ci - compatible: value should be one of the following: 58c2ecf20Sopenharmony_ci "atmel,at91sam9n12-hlcdc" 68c2ecf20Sopenharmony_ci "atmel,at91sam9x5-hlcdc" 78c2ecf20Sopenharmony_ci "atmel,sama5d2-hlcdc" 88c2ecf20Sopenharmony_ci "atmel,sama5d3-hlcdc" 98c2ecf20Sopenharmony_ci "atmel,sama5d4-hlcdc" 108c2ecf20Sopenharmony_ci "microchip,sam9x60-hlcdc" 118c2ecf20Sopenharmony_ci - reg: base address and size of the HLCDC device registers. 128c2ecf20Sopenharmony_ci - clock-names: the name of the 3 clocks requested by the HLCDC device. 138c2ecf20Sopenharmony_ci Should contain "periph_clk", "sys_clk" and "slow_clk". 148c2ecf20Sopenharmony_ci - clocks: should contain the 3 clocks requested by the HLCDC device. 158c2ecf20Sopenharmony_ci - interrupts: should contain the description of the HLCDC interrupt line 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ciThe HLCDC IP exposes two subdevices: 188c2ecf20Sopenharmony_ci - a PWM chip: see ../pwm/atmel-hlcdc-pwm.txt 198c2ecf20Sopenharmony_ci - a Display Controller: see ../display/atmel/hlcdc-dc.txt 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ciExample: 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ci hlcdc: hlcdc@f0030000 { 248c2ecf20Sopenharmony_ci compatible = "atmel,sama5d3-hlcdc"; 258c2ecf20Sopenharmony_ci reg = <0xf0030000 0x2000>; 268c2ecf20Sopenharmony_ci clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; 278c2ecf20Sopenharmony_ci clock-names = "periph_clk","sys_clk", "slow_clk"; 288c2ecf20Sopenharmony_ci interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci hlcdc-display-controller { 318c2ecf20Sopenharmony_ci compatible = "atmel,hlcdc-display-controller"; 328c2ecf20Sopenharmony_ci pinctrl-names = "default"; 338c2ecf20Sopenharmony_ci pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>; 348c2ecf20Sopenharmony_ci #address-cells = <1>; 358c2ecf20Sopenharmony_ci #size-cells = <0>; 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ci port@0 { 388c2ecf20Sopenharmony_ci #address-cells = <1>; 398c2ecf20Sopenharmony_ci #size-cells = <0>; 408c2ecf20Sopenharmony_ci reg = <0>; 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_ci hlcdc_panel_output: endpoint@0 { 438c2ecf20Sopenharmony_ci reg = <0>; 448c2ecf20Sopenharmony_ci remote-endpoint = <&panel_input>; 458c2ecf20Sopenharmony_ci }; 468c2ecf20Sopenharmony_ci }; 478c2ecf20Sopenharmony_ci }; 488c2ecf20Sopenharmony_ci 498c2ecf20Sopenharmony_ci hlcdc_pwm: hlcdc-pwm { 508c2ecf20Sopenharmony_ci compatible = "atmel,hlcdc-pwm"; 518c2ecf20Sopenharmony_ci pinctrl-names = "default"; 528c2ecf20Sopenharmony_ci pinctrl-0 = <&pinctrl_lcd_pwm>; 538c2ecf20Sopenharmony_ci #pwm-cells = <3>; 548c2ecf20Sopenharmony_ci }; 558c2ecf20Sopenharmony_ci }; 56