18c2ecf20Sopenharmony_ciThe Aspeed System Control Unit manages the global behaviour of the SoC, 28c2ecf20Sopenharmony_ciconfiguring elements such as clocks, pinmux, and reset. 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ciRequired properties: 58c2ecf20Sopenharmony_ci- compatible: One of: 68c2ecf20Sopenharmony_ci "aspeed,ast2400-scu", "syscon", "simple-mfd" 78c2ecf20Sopenharmony_ci "aspeed,ast2500-scu", "syscon", "simple-mfd" 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci- reg: contains the offset and length of the SCU memory region 108c2ecf20Sopenharmony_ci- #clock-cells: should be set to <1> - the system controller is also a 118c2ecf20Sopenharmony_ci clock provider 128c2ecf20Sopenharmony_ci- #reset-cells: should be set to <1> - the system controller is also a 138c2ecf20Sopenharmony_ci reset line provider 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ciExample: 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_cisyscon: syscon@1e6e2000 { 188c2ecf20Sopenharmony_ci compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd"; 198c2ecf20Sopenharmony_ci reg = <0x1e6e2000 0x1a8>; 208c2ecf20Sopenharmony_ci #clock-cells = <1>; 218c2ecf20Sopenharmony_ci #reset-cells = <1>; 228c2ecf20Sopenharmony_ci}; 23