18c2ecf20Sopenharmony_ci* Altera Arria10 Development Kit System Resource Chip
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciRequired parent device properties:
48c2ecf20Sopenharmony_ci- compatible		: "altr,a10sr"
58c2ecf20Sopenharmony_ci- spi-max-frequency	: Maximum SPI frequency.
68c2ecf20Sopenharmony_ci- reg			: The SPI Chip Select address for the Arria10
78c2ecf20Sopenharmony_ci			  System Resource chip
88c2ecf20Sopenharmony_ci- interrupts		: The interrupt line the device is connected to.
98c2ecf20Sopenharmony_ci- interrupt-controller	: Marks the device node as an interrupt controller.
108c2ecf20Sopenharmony_ci- #interrupt-cells	: The number of cells to describe an IRQ, should be 2.
118c2ecf20Sopenharmony_ci			    The first cell is the IRQ number.
128c2ecf20Sopenharmony_ci			    The second cell is the flags, encoded as trigger
138c2ecf20Sopenharmony_ci			    masks from ../interrupt-controller/interrupts.txt.
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_ciThe A10SR consists of these sub-devices:
168c2ecf20Sopenharmony_ci
178c2ecf20Sopenharmony_ciDevice                   Description
188c2ecf20Sopenharmony_ci------                   ----------
198c2ecf20Sopenharmony_cia10sr_gpio               GPIO Controller
208c2ecf20Sopenharmony_cia10sr_rst                Reset Controller
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_ciArria10 GPIO
238c2ecf20Sopenharmony_ciRequired Properties:
248c2ecf20Sopenharmony_ci- compatible        : Should be "altr,a10sr-gpio"
258c2ecf20Sopenharmony_ci- gpio-controller   : Marks the device node as a GPIO Controller.
268c2ecf20Sopenharmony_ci- #gpio-cells       : Should be two.  The first cell is the pin number and
278c2ecf20Sopenharmony_ci                      the second cell is used to specify flags.
288c2ecf20Sopenharmony_ci                      See ../gpio/gpio.txt for more information.
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_ciArria10 Peripheral PHY Reset
318c2ecf20Sopenharmony_ciRequired Properties:
328c2ecf20Sopenharmony_ci- compatible        : Should be "altr,a10sr-reset"
338c2ecf20Sopenharmony_ci- #reset-cells      : Should be one.
348c2ecf20Sopenharmony_ci
358c2ecf20Sopenharmony_ciExample:
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_ci        resource-manager@0 {
388c2ecf20Sopenharmony_ci		compatible = "altr,a10sr";
398c2ecf20Sopenharmony_ci		reg = <0>;
408c2ecf20Sopenharmony_ci		spi-max-frequency = <100000>;
418c2ecf20Sopenharmony_ci		interrupt-parent = <&portb>;
428c2ecf20Sopenharmony_ci		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
438c2ecf20Sopenharmony_ci		interrupt-controller;
448c2ecf20Sopenharmony_ci		#interrupt-cells = <2>;
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_ci		a10sr_gpio: gpio-controller {
478c2ecf20Sopenharmony_ci			compatible = "altr,a10sr-gpio";
488c2ecf20Sopenharmony_ci			gpio-controller;
498c2ecf20Sopenharmony_ci			#gpio-cells = <2>;
508c2ecf20Sopenharmony_ci		};
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_ci		a10sr_rst: reset-controller {
538c2ecf20Sopenharmony_ci			compatible = "altr,a10sr-reset";
548c2ecf20Sopenharmony_ci			#reset-cells = <1>;
558c2ecf20Sopenharmony_ci		};
568c2ecf20Sopenharmony_ci	};
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