18c2ecf20Sopenharmony_ci* EMIF family of TI SDRAM controllers 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciEMIF - External Memory Interface - is an SDRAM controller used in 48c2ecf20Sopenharmony_ciTI SoCs. EMIF supports, based on the IP revision, one or more of 58c2ecf20Sopenharmony_ciDDR2/DDR3/LPDDR2 protocols. This binding describes a given instance 68c2ecf20Sopenharmony_ciof the EMIF IP and memory parts attached to it. Certain revisions 78c2ecf20Sopenharmony_ciof the EMIF controller also contain optional ECC support, which 88c2ecf20Sopenharmony_cicorrects one bit errors and detects two bit errors. 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ciRequired properties: 118c2ecf20Sopenharmony_ci- compatible : Should be of the form "ti,emif-<ip-rev>" where <ip-rev> 128c2ecf20Sopenharmony_ci is the IP revision of the specific EMIF instance. For newer controllers, 138c2ecf20Sopenharmony_ci compatible should be one of the following: 148c2ecf20Sopenharmony_ci "ti,emif-am3352" 158c2ecf20Sopenharmony_ci "ti,emif-am4372" 168c2ecf20Sopenharmony_ci "ti,emif-dra7xx" 178c2ecf20Sopenharmony_ci "ti,emif-keystone" 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci- phy-type : <u32> indicating the DDR phy type. Following are the 208c2ecf20Sopenharmony_ci allowed values 218c2ecf20Sopenharmony_ci <1> : Attila PHY 228c2ecf20Sopenharmony_ci <2> : Intelli PHY 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci- device-handle : phandle to a "lpddr2" node representing the memory part 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci- ti,hwmods : For TI hwmods processing and omap device creation 278c2ecf20Sopenharmony_ci the value shall be "emif<n>" where <n> is the number of the EMIF 288c2ecf20Sopenharmony_ci instance with base 1. 298c2ecf20Sopenharmony_ci- interrupts : interrupt used by the controller 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ciRequired only for "ti,emif-am3352" and "ti,emif-am4372": 328c2ecf20Sopenharmony_ci- sram : Phandles for generic sram driver nodes, 338c2ecf20Sopenharmony_ci first should be type 'protect-exec' for the driver to use to copy 348c2ecf20Sopenharmony_ci and run PM functions, second should be regular pool to be used for 358c2ecf20Sopenharmony_ci data region for code. See Documentation/devicetree/bindings/sram/sram.yaml 368c2ecf20Sopenharmony_ci for more details. 378c2ecf20Sopenharmony_ci 388c2ecf20Sopenharmony_ciOptional properties: 398c2ecf20Sopenharmony_ci- cs1-used : Have this property if CS1 of this EMIF 408c2ecf20Sopenharmony_ci instance has a memory part attached to it. If there is a memory 418c2ecf20Sopenharmony_ci part attached to CS1, it should be the same type as the one on CS0, 428c2ecf20Sopenharmony_ci so there is no need to give the details of this memory part. 438c2ecf20Sopenharmony_ci 448c2ecf20Sopenharmony_ci- cal-resistor-per-cs : Have this property if the board has one 458c2ecf20Sopenharmony_ci calibration resistor per chip-select. 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ci- hw-caps-read-idle-ctrl: Have this property if the controller 488c2ecf20Sopenharmony_ci supports read idle window programming 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_ci- hw-caps-dll-calib-ctrl: Have this property if the controller 518c2ecf20Sopenharmony_ci supports dll calibration control 528c2ecf20Sopenharmony_ci 538c2ecf20Sopenharmony_ci- hw-caps-ll-interface : Have this property if the controller 548c2ecf20Sopenharmony_ci has a low latency interface and corresponding interrupt events 558c2ecf20Sopenharmony_ci 568c2ecf20Sopenharmony_ci- hw-caps-temp-alert : Have this property if the controller 578c2ecf20Sopenharmony_ci has capability for generating SDRAM temperature alerts 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_ci-Examples: 608c2ecf20Sopenharmony_ci 618c2ecf20Sopenharmony_ciemif1: emif@4c000000 { 628c2ecf20Sopenharmony_ci compatible = "ti,emif-4d"; 638c2ecf20Sopenharmony_ci ti,hwmods = "emif2"; 648c2ecf20Sopenharmony_ci phy-type = <1>; 658c2ecf20Sopenharmony_ci device-handle = <&elpida_ECB240ABACN>; 668c2ecf20Sopenharmony_ci cs1-used; 678c2ecf20Sopenharmony_ci hw-caps-read-idle-ctrl; 688c2ecf20Sopenharmony_ci hw-caps-ll-interface; 698c2ecf20Sopenharmony_ci hw-caps-temp-alert; 708c2ecf20Sopenharmony_ci}; 718c2ecf20Sopenharmony_ci 728c2ecf20Sopenharmony_ci/* From am33xx.dtsi */ 738c2ecf20Sopenharmony_ciemif: emif@4c000000 { 748c2ecf20Sopenharmony_ci compatible = "ti,emif-am3352"; 758c2ecf20Sopenharmony_ci reg = <0x4C000000 0x1000>; 768c2ecf20Sopenharmony_ci sram = <&pm_sram_code 778c2ecf20Sopenharmony_ci &pm_sram_data>; 788c2ecf20Sopenharmony_ci}; 798c2ecf20Sopenharmony_ci 808c2ecf20Sopenharmony_ciemif1: emif@4c000000 { 818c2ecf20Sopenharmony_ci compatible = "ti,emif-dra7xx"; 828c2ecf20Sopenharmony_ci reg = <0x4c000000 0x200>; 838c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 848c2ecf20Sopenharmony_ci}; 85