18c2ecf20Sopenharmony_ci* Device tree bindings for Texas Instruments da8xx DDR2/mDDR memory controller 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThe DDR2/mDDR memory controller present on Texas Instruments da8xx SoCs features 48c2ecf20Sopenharmony_cia set of registers which allow to tweak the controller's behavior. 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ciDocumentation: 78c2ecf20Sopenharmony_ciOMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh82c/spruh82c.pdf 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ciRequired properties: 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci- compatible: "ti,da850-ddr-controller" - for da850 SoC based boards 128c2ecf20Sopenharmony_ci- reg: a tuple containing the base address of the memory 138c2ecf20Sopenharmony_ci controller and the size of the memory area to map 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ciExample for da850 shown below. 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ciddrctl { 188c2ecf20Sopenharmony_ci compatible = "ti,da850-ddr-controller"; 198c2ecf20Sopenharmony_ci reg = <0xb0000000 0xe8>; 208c2ecf20Sopenharmony_ci}; 21