18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 28c2ecf20Sopenharmony_ci%YAML 1.2 38c2ecf20Sopenharmony_ci--- 48c2ecf20Sopenharmony_ci$id: "http://devicetree.org/schemas/memory-controllers/renesas,dbsc.yaml#" 58c2ecf20Sopenharmony_ci$schema: "http://devicetree.org/meta-schemas/core.yaml#" 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_cititle: Renesas DDR Bus Controllers 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_cimaintainers: 108c2ecf20Sopenharmony_ci - Geert Uytterhoeven <geert+renesas@glider.be> 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_cidescription: | 138c2ecf20Sopenharmony_ci Renesas SoCs contain one or more memory controllers. These memory 148c2ecf20Sopenharmony_ci controllers differ from one SoC variant to another, and are called by 158c2ecf20Sopenharmony_ci different names, e.g. "DDR Bus Controller (DBSC)", "DDR3 Bus State Controller 168c2ecf20Sopenharmony_ci (DBSC3)", or "SDRAM Bus State Controller (SBSC)"). 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ciproperties: 198c2ecf20Sopenharmony_ci compatible: 208c2ecf20Sopenharmony_ci enum: 218c2ecf20Sopenharmony_ci - renesas,dbsc-r8a73a4 # R-Mobile APE6 228c2ecf20Sopenharmony_ci - renesas,dbsc3-r8a7740 # R-Mobile A1 238c2ecf20Sopenharmony_ci - renesas,sbsc-sh73a0 # SH-Mobile AG5 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci reg: 268c2ecf20Sopenharmony_ci maxItems: 1 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ci interrupts: 298c2ecf20Sopenharmony_ci maxItems: 2 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci interrupt-names: 328c2ecf20Sopenharmony_ci items: 338c2ecf20Sopenharmony_ci - const: sec # secure interrupt 348c2ecf20Sopenharmony_ci - const: temp # normal (temperature) interrupt 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_ci power-domains: 378c2ecf20Sopenharmony_ci maxItems: 1 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_cirequired: 408c2ecf20Sopenharmony_ci - compatible 418c2ecf20Sopenharmony_ci - reg 428c2ecf20Sopenharmony_ci - power-domains 438c2ecf20Sopenharmony_ci 448c2ecf20Sopenharmony_ciadditionalProperties: false 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ciexamples: 478c2ecf20Sopenharmony_ci - | 488c2ecf20Sopenharmony_ci #include <dt-bindings/interrupt-controller/arm-gic.h> 498c2ecf20Sopenharmony_ci sbsc1: memory-controller@fe400000 { 508c2ecf20Sopenharmony_ci compatible = "renesas,sbsc-sh73a0"; 518c2ecf20Sopenharmony_ci reg = <0xfe400000 0x400>; 528c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 538c2ecf20Sopenharmony_ci <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 548c2ecf20Sopenharmony_ci interrupt-names = "sec", "temp"; 558c2ecf20Sopenharmony_ci power-domains = <&pd_a4bc0>; 568c2ecf20Sopenharmony_ci }; 57