18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 28c2ecf20Sopenharmony_ci%YAML 1.2 38c2ecf20Sopenharmony_ci--- 48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra210-emc.yaml# 58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_cititle: NVIDIA Tegra210 SoC External Memory Controller 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_cimaintainers: 108c2ecf20Sopenharmony_ci - Thierry Reding <thierry.reding@gmail.com> 118c2ecf20Sopenharmony_ci - Jon Hunter <jonathanh@nvidia.com> 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_cidescription: | 148c2ecf20Sopenharmony_ci The EMC interfaces with the off-chip SDRAM to service the request stream 158c2ecf20Sopenharmony_ci sent from the memory controller. 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ciproperties: 188c2ecf20Sopenharmony_ci compatible: 198c2ecf20Sopenharmony_ci const: nvidia,tegra210-emc 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ci reg: 228c2ecf20Sopenharmony_ci maxItems: 3 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci clocks: 258c2ecf20Sopenharmony_ci items: 268c2ecf20Sopenharmony_ci - description: external memory clock 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ci clock-names: 298c2ecf20Sopenharmony_ci items: 308c2ecf20Sopenharmony_ci - const: emc 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_ci interrupts: 338c2ecf20Sopenharmony_ci items: 348c2ecf20Sopenharmony_ci - description: EMC general interrupt 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_ci memory-region: 378c2ecf20Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/phandle 388c2ecf20Sopenharmony_ci description: 398c2ecf20Sopenharmony_ci phandle to a reserved memory region describing the table of EMC 408c2ecf20Sopenharmony_ci frequencies trained by the firmware 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_ci nvidia,memory-controller: 438c2ecf20Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/phandle 448c2ecf20Sopenharmony_ci description: 458c2ecf20Sopenharmony_ci phandle of the memory controller node 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_cirequired: 488c2ecf20Sopenharmony_ci - compatible 498c2ecf20Sopenharmony_ci - reg 508c2ecf20Sopenharmony_ci - clocks 518c2ecf20Sopenharmony_ci - clock-names 528c2ecf20Sopenharmony_ci - nvidia,memory-controller 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ciadditionalProperties: false 558c2ecf20Sopenharmony_ci 568c2ecf20Sopenharmony_ciexamples: 578c2ecf20Sopenharmony_ci - | 588c2ecf20Sopenharmony_ci #include <dt-bindings/clock/tegra210-car.h> 598c2ecf20Sopenharmony_ci #include <dt-bindings/interrupt-controller/arm-gic.h> 608c2ecf20Sopenharmony_ci 618c2ecf20Sopenharmony_ci reserved-memory { 628c2ecf20Sopenharmony_ci #address-cells = <1>; 638c2ecf20Sopenharmony_ci #size-cells = <1>; 648c2ecf20Sopenharmony_ci ranges; 658c2ecf20Sopenharmony_ci 668c2ecf20Sopenharmony_ci emc_table: emc-table@83400000 { 678c2ecf20Sopenharmony_ci compatible = "nvidia,tegra210-emc-table"; 688c2ecf20Sopenharmony_ci reg = <0x83400000 0x10000>; 698c2ecf20Sopenharmony_ci }; 708c2ecf20Sopenharmony_ci }; 718c2ecf20Sopenharmony_ci 728c2ecf20Sopenharmony_ci external-memory-controller@7001b000 { 738c2ecf20Sopenharmony_ci compatible = "nvidia,tegra210-emc"; 748c2ecf20Sopenharmony_ci reg = <0x7001b000 0x1000>, 758c2ecf20Sopenharmony_ci <0x7001e000 0x1000>, 768c2ecf20Sopenharmony_ci <0x7001f000 0x1000>; 778c2ecf20Sopenharmony_ci clocks = <&tegra_car TEGRA210_CLK_EMC>; 788c2ecf20Sopenharmony_ci clock-names = "emc"; 798c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 808c2ecf20Sopenharmony_ci memory-region = <&emc_table>; 818c2ecf20Sopenharmony_ci nvidia,memory-controller = <&mc>; 828c2ecf20Sopenharmony_ci }; 83