18c2ecf20Sopenharmony_ciDevice Tree bindings for MVEBU SDRAM controllers
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38c2ecf20Sopenharmony_ciThe Marvell EBU SoCs all have a SDRAM controller. The SDRAM controller
48c2ecf20Sopenharmony_cidiffers from one SoC variant to another, but they also share a number
58c2ecf20Sopenharmony_ciof commonalities.
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78c2ecf20Sopenharmony_ciFor now, this Device Tree binding documentation only documents the
88c2ecf20Sopenharmony_ciArmada XP SDRAM controller.
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108c2ecf20Sopenharmony_ciRequired properties:
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128c2ecf20Sopenharmony_ci - compatible: for Armada XP, "marvell,armada-xp-sdram-controller"
138c2ecf20Sopenharmony_ci - reg: a resource specifier for the register space, which should
148c2ecf20Sopenharmony_ci   include all SDRAM controller registers as per the datasheet.
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168c2ecf20Sopenharmony_ciExample:
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188c2ecf20Sopenharmony_cisdramc@1400 {
198c2ecf20Sopenharmony_ci	compatible = "marvell,armada-xp-sdram-controller";
208c2ecf20Sopenharmony_ci	reg = <0x1400 0x500>;
218c2ecf20Sopenharmony_ci};
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