18c2ecf20Sopenharmony_ciDevice Tree bindings for MVEBU SDRAM controllers 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThe Marvell EBU SoCs all have a SDRAM controller. The SDRAM controller 48c2ecf20Sopenharmony_cidiffers from one SoC variant to another, but they also share a number 58c2ecf20Sopenharmony_ciof commonalities. 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ciFor now, this Device Tree binding documentation only documents the 88c2ecf20Sopenharmony_ciArmada XP SDRAM controller. 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ciRequired properties: 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ci - compatible: for Armada XP, "marvell,armada-xp-sdram-controller" 138c2ecf20Sopenharmony_ci - reg: a resource specifier for the register space, which should 148c2ecf20Sopenharmony_ci include all SDRAM controller registers as per the datasheet. 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ciExample: 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_cisdramc@1400 { 198c2ecf20Sopenharmony_ci compatible = "marvell,armada-xp-sdram-controller"; 208c2ecf20Sopenharmony_ci reg = <0x1400 0x500>; 218c2ecf20Sopenharmony_ci}; 22