18c2ecf20Sopenharmony_ciFreescale DDR memory controller 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciProperties: 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ci- compatible : Should include "fsl,chip-memory-controller" where 68c2ecf20Sopenharmony_ci chip is the processor (bsc9132, mpc8572 etc.), or 78c2ecf20Sopenharmony_ci "fsl,qoriq-memory-controller". 88c2ecf20Sopenharmony_ci- reg : Address and size of DDR controller registers 98c2ecf20Sopenharmony_ci- interrupts : Error interrupt of DDR controller 108c2ecf20Sopenharmony_ci- little-endian : Specifies little-endian access to registers 118c2ecf20Sopenharmony_ci If omitted, big-endian will be used. 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ciExample 1: 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ci memory-controller@2000 { 168c2ecf20Sopenharmony_ci compatible = "fsl,bsc9132-memory-controller"; 178c2ecf20Sopenharmony_ci reg = <0x2000 0x1000>; 188c2ecf20Sopenharmony_ci interrupts = <16 2 1 8>; 198c2ecf20Sopenharmony_ci }; 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ciExample 2: 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci ddr1: memory-controller@8000 { 258c2ecf20Sopenharmony_ci compatible = "fsl,qoriq-memory-controller-v4.7", 268c2ecf20Sopenharmony_ci "fsl,qoriq-memory-controller"; 278c2ecf20Sopenharmony_ci reg = <0x8000 0x1000>; 288c2ecf20Sopenharmony_ci interrupts = <16 2 1 23>; 298c2ecf20Sopenharmony_ci }; 30