18c2ecf20Sopenharmony_ci* Tegra HDMI CEC hardware 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThe HDMI CEC module is present in Tegra SoCs and its purpose is to 48c2ecf20Sopenharmony_cihandle communication between HDMI connected devices over the CEC bus. 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ciRequired properties: 78c2ecf20Sopenharmony_ci - compatible : value should be one of the following: 88c2ecf20Sopenharmony_ci "nvidia,tegra114-cec" 98c2ecf20Sopenharmony_ci "nvidia,tegra124-cec" 108c2ecf20Sopenharmony_ci "nvidia,tegra210-cec" 118c2ecf20Sopenharmony_ci - reg : Physical base address of the IP registers and length of memory 128c2ecf20Sopenharmony_ci mapped region. 138c2ecf20Sopenharmony_ci - interrupts : HDMI CEC interrupt number to the CPU. 148c2ecf20Sopenharmony_ci - clocks : from common clock binding: handle to HDMI CEC clock. 158c2ecf20Sopenharmony_ci - clock-names : from common clock binding: must contain "cec", 168c2ecf20Sopenharmony_ci corresponding to the entry in the clocks property. 178c2ecf20Sopenharmony_ci - hdmi-phandle : phandle to the HDMI controller, see also cec.txt. 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ciExample: 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_cicec@70015000 { 228c2ecf20Sopenharmony_ci compatible = "nvidia,tegra124-cec"; 238c2ecf20Sopenharmony_ci reg = <0x0 0x70015000 0x0 0x00001000>; 248c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 258c2ecf20Sopenharmony_ci clocks = <&tegra_car TEGRA124_CLK_CEC>; 268c2ecf20Sopenharmony_ci clock-names = "cec"; 278c2ecf20Sopenharmony_ci}; 28