18c2ecf20Sopenharmony_ciSTMicroelectronics STi c8sectpfe binding 28c2ecf20Sopenharmony_ci============================================ 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ciThis document describes the c8sectpfe device bindings that is used to get transport 58c2ecf20Sopenharmony_cistream data into the SoC on the TS pins, and into DDR for further processing. 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ciIt is typically used in conjunction with one or more demodulator and tuner devices 88c2ecf20Sopenharmony_ciwhich converts from the RF to digital domain. Demodulators and tuners are usually 98c2ecf20Sopenharmony_cilocated on an external DVB frontend card connected to SoC TS input pins. 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ciCurrently 7 TS input (tsin) channels are supported on the stih407 family SoC. 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ciRequired properties (controller (parent) node): 148c2ecf20Sopenharmony_ci- compatible : Should be "stih407-c8sectpfe" 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ci- reg : Address and length of register sets for each device in 178c2ecf20Sopenharmony_ci "reg-names" 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci- reg-names : The names of the register addresses corresponding to the 208c2ecf20Sopenharmony_ci registers filled in "reg": 218c2ecf20Sopenharmony_ci - c8sectpfe: c8sectpfe registers 228c2ecf20Sopenharmony_ci - c8sectpfe-ram: c8sectpfe internal sram 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci- clocks : phandle list of c8sectpfe clocks 258c2ecf20Sopenharmony_ci- clock-names : should be "c8sectpfe" 268c2ecf20Sopenharmony_ciSee: Documentation/devicetree/bindings/clock/clock-bindings.txt 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ci- pinctrl-names : a pinctrl state named tsin%d-serial or tsin%d-parallel (where %d is tsin-num) 298c2ecf20Sopenharmony_ci must be defined for each tsin child node. 308c2ecf20Sopenharmony_ci- pinctrl-0 : phandle referencing pin configuration for this tsin configuration 318c2ecf20Sopenharmony_ciSee: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci 348c2ecf20Sopenharmony_ciRequired properties (tsin (child) node): 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_ci- tsin-num : tsin id of the InputBlock (must be between 0 to 6) 378c2ecf20Sopenharmony_ci- i2c-bus : phandle to the I2C bus DT node which the demodulators & tuners on this tsin channel are connected. 388c2ecf20Sopenharmony_ci- reset-gpios : reset gpio for this tsin channel. 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_ciOptional properties (tsin (child) node): 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_ci- invert-ts-clk : Bool property to control sense of ts input clock (data stored on falling edge of clk). 438c2ecf20Sopenharmony_ci- serial-not-parallel : Bool property to configure input bus width (serial on ts_data<7>). 448c2ecf20Sopenharmony_ci- async-not-sync : Bool property to control if data is received in asynchronous mode 458c2ecf20Sopenharmony_ci (all bits/bytes with ts_valid or ts_packet asserted are valid). 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ci- dvb-card : Describes the NIM card connected to this tsin channel. 488c2ecf20Sopenharmony_ci 498c2ecf20Sopenharmony_ciExample: 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_ci/* stih410 SoC b2120 + b2004a + stv0367-pll(NIMB) + stv0367-tda18212 (NIMA) DT example) */ 528c2ecf20Sopenharmony_ci 538c2ecf20Sopenharmony_ci c8sectpfe@8a20000 { 548c2ecf20Sopenharmony_ci compatible = "st,stih407-c8sectpfe"; 558c2ecf20Sopenharmony_ci reg = <0x08a20000 0x10000>, <0x08a00000 0x4000>; 568c2ecf20Sopenharmony_ci reg-names = "stfe", "stfe-ram"; 578c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 34 IRQ_TYPE_NONE>, <GIC_SPI 35 IRQ_TYPE_NONE>; 588c2ecf20Sopenharmony_ci interrupt-names = "stfe-error-irq", "stfe-idle-irq"; 598c2ecf20Sopenharmony_ci pinctrl-0 = <&pinctrl_tsin0_serial>; 608c2ecf20Sopenharmony_ci pinctrl-1 = <&pinctrl_tsin0_parallel>; 618c2ecf20Sopenharmony_ci pinctrl-2 = <&pinctrl_tsin3_serial>; 628c2ecf20Sopenharmony_ci pinctrl-3 = <&pinctrl_tsin4_serial_alt3>; 638c2ecf20Sopenharmony_ci pinctrl-4 = <&pinctrl_tsin5_serial_alt1>; 648c2ecf20Sopenharmony_ci pinctrl-names = "tsin0-serial", 658c2ecf20Sopenharmony_ci "tsin0-parallel", 668c2ecf20Sopenharmony_ci "tsin3-serial", 678c2ecf20Sopenharmony_ci "tsin4-serial", 688c2ecf20Sopenharmony_ci "tsin5-serial"; 698c2ecf20Sopenharmony_ci clocks = <&clk_s_c0_flexgen CLK_PROC_STFE>; 708c2ecf20Sopenharmony_ci clock-names = "c8sectpfe"; 718c2ecf20Sopenharmony_ci 728c2ecf20Sopenharmony_ci /* tsin0 is TSA on NIMA */ 738c2ecf20Sopenharmony_ci tsin0: port@0 { 748c2ecf20Sopenharmony_ci tsin-num = <0>; 758c2ecf20Sopenharmony_ci serial-not-parallel; 768c2ecf20Sopenharmony_ci i2c-bus = <&ssc2>; 778c2ecf20Sopenharmony_ci reset-gpios = <&pio15 4 GPIO_ACTIVE_HIGH>; 788c2ecf20Sopenharmony_ci dvb-card = <STV0367_TDA18212_NIMA_1>; 798c2ecf20Sopenharmony_ci }; 808c2ecf20Sopenharmony_ci 818c2ecf20Sopenharmony_ci tsin3: port@3 { 828c2ecf20Sopenharmony_ci tsin-num = <3>; 838c2ecf20Sopenharmony_ci serial-not-parallel; 848c2ecf20Sopenharmony_ci i2c-bus = <&ssc3>; 858c2ecf20Sopenharmony_ci reset-gpios = <&pio15 7 GPIO_ACTIVE_HIGH>; 868c2ecf20Sopenharmony_ci dvb-card = <STV0367_TDA18212_NIMB_1>; 878c2ecf20Sopenharmony_ci }; 888c2ecf20Sopenharmony_ci }; 89