18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
28c2ecf20Sopenharmony_ci%YAML 1.2
38c2ecf20Sopenharmony_ci---
48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/media/st,stm32-dcmi.yaml#
58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_cititle: STMicroelectronics STM32 Digital Camera Memory Interface (DCMI) binding
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_cimaintainers:
108c2ecf20Sopenharmony_ci  - Hugues Fruchet <hugues.fruchet@st.com>
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_ciproperties:
138c2ecf20Sopenharmony_ci  compatible:
148c2ecf20Sopenharmony_ci    const: st,stm32-dcmi
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ci  reg:
178c2ecf20Sopenharmony_ci    maxItems: 1
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ci  interrupts:
208c2ecf20Sopenharmony_ci    maxItems: 1
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_ci  clocks:
238c2ecf20Sopenharmony_ci    maxItems: 1
248c2ecf20Sopenharmony_ci
258c2ecf20Sopenharmony_ci  clock-names:
268c2ecf20Sopenharmony_ci    items:
278c2ecf20Sopenharmony_ci      - const: mclk
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_ci  dmas:
308c2ecf20Sopenharmony_ci    maxItems: 1
318c2ecf20Sopenharmony_ci
328c2ecf20Sopenharmony_ci  dma-names:
338c2ecf20Sopenharmony_ci    items:
348c2ecf20Sopenharmony_ci      - const: tx
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_ci  resets:
378c2ecf20Sopenharmony_ci    maxItems: 1
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_ci  port:
408c2ecf20Sopenharmony_ci    type: object
418c2ecf20Sopenharmony_ci    description:
428c2ecf20Sopenharmony_ci      DCMI supports a single port node with parallel bus. It should contain
438c2ecf20Sopenharmony_ci      one 'port' child node with child 'endpoint' node. Please refer to the
448c2ecf20Sopenharmony_ci      bindings defined in
458c2ecf20Sopenharmony_ci      Documentation/devicetree/bindings/media/video-interfaces.txt.
468c2ecf20Sopenharmony_ci
478c2ecf20Sopenharmony_cirequired:
488c2ecf20Sopenharmony_ci  - compatible
498c2ecf20Sopenharmony_ci  - reg
508c2ecf20Sopenharmony_ci  - interrupts
518c2ecf20Sopenharmony_ci  - clocks
528c2ecf20Sopenharmony_ci  - clock-names
538c2ecf20Sopenharmony_ci  - resets
548c2ecf20Sopenharmony_ci  - dmas
558c2ecf20Sopenharmony_ci  - dma-names
568c2ecf20Sopenharmony_ci  - port
578c2ecf20Sopenharmony_ci
588c2ecf20Sopenharmony_ciadditionalProperties: false
598c2ecf20Sopenharmony_ci
608c2ecf20Sopenharmony_ciexamples:
618c2ecf20Sopenharmony_ci  - |
628c2ecf20Sopenharmony_ci    #include <dt-bindings/interrupt-controller/arm-gic.h>
638c2ecf20Sopenharmony_ci    #include <dt-bindings/clock/stm32mp1-clks.h>
648c2ecf20Sopenharmony_ci    #include <dt-bindings/reset/stm32mp1-resets.h>
658c2ecf20Sopenharmony_ci    dcmi: dcmi@4c006000 {
668c2ecf20Sopenharmony_ci        compatible = "st,stm32-dcmi";
678c2ecf20Sopenharmony_ci        reg = <0x4c006000 0x400>;
688c2ecf20Sopenharmony_ci        interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
698c2ecf20Sopenharmony_ci        resets = <&rcc CAMITF_R>;
708c2ecf20Sopenharmony_ci        clocks = <&rcc DCMI>;
718c2ecf20Sopenharmony_ci        clock-names = "mclk";
728c2ecf20Sopenharmony_ci        dmas = <&dmamux1 75 0x400 0x0d>;
738c2ecf20Sopenharmony_ci        dma-names = "tx";
748c2ecf20Sopenharmony_ci
758c2ecf20Sopenharmony_ci        port {
768c2ecf20Sopenharmony_ci             dcmi_0: endpoint {
778c2ecf20Sopenharmony_ci                   remote-endpoint = <&ov5640_0>;
788c2ecf20Sopenharmony_ci                   bus-width = <8>;
798c2ecf20Sopenharmony_ci                   hsync-active = <0>;
808c2ecf20Sopenharmony_ci                   vsync-active = <0>;
818c2ecf20Sopenharmony_ci                   pclk-sample = <1>;
828c2ecf20Sopenharmony_ci             };
838c2ecf20Sopenharmony_ci        };
848c2ecf20Sopenharmony_ci    };
858c2ecf20Sopenharmony_ci
868c2ecf20Sopenharmony_ci...
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