18c2ecf20Sopenharmony_ciSamsung S5P/Exynos SoC Camera Subsystem (FIMC) 28c2ecf20Sopenharmony_ci---------------------------------------------- 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ciThe S5P/Exynos SoC Camera subsystem comprises of multiple sub-devices 58c2ecf20Sopenharmony_cirepresented by separate device tree nodes. Currently this includes: FIMC (in 68c2ecf20Sopenharmony_cithe S5P SoCs series known as CAMIF), MIPI CSIS, FIMC-LITE and FIMC-IS (ISP). 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ciThe sub-subdevices are defined as child nodes of the common 'camera' node which 98c2ecf20Sopenharmony_cialso includes common properties of the whole subsystem not really specific to 108c2ecf20Sopenharmony_ciany single sub-device, like common camera port pins or the CAMCLK clock outputs 118c2ecf20Sopenharmony_cifor external image sensors attached to an SoC. 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ciCommon 'camera' node 148c2ecf20Sopenharmony_ci-------------------- 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ciRequired properties: 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci- compatible: must be "samsung,fimc", "simple-bus" 198c2ecf20Sopenharmony_ci- clocks: list of clock specifiers, corresponding to entries in 208c2ecf20Sopenharmony_ci the clock-names property; 218c2ecf20Sopenharmony_ci- clock-names : must contain "sclk_cam0", "sclk_cam1", "pxl_async0", 228c2ecf20Sopenharmony_ci "pxl_async1" entries, matching entries in the clocks property. 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci- #clock-cells: from the common clock bindings (../clock/clock-bindings.txt), 258c2ecf20Sopenharmony_ci must be 1. A clock provider is associated with the 'camera' node and it should 268c2ecf20Sopenharmony_ci be referenced by external sensors that use clocks provided by the SoC on 278c2ecf20Sopenharmony_ci CAM_*_CLKOUT pins. The clock specifier cell stores an index of a clock. 288c2ecf20Sopenharmony_ci The indices are 0, 1 for CAM_A_CLKOUT, CAM_B_CLKOUT clocks respectively. 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci- clock-output-names: from the common clock bindings, should contain names of 318c2ecf20Sopenharmony_ci clocks registered by the camera subsystem corresponding to CAM_A_CLKOUT, 328c2ecf20Sopenharmony_ci CAM_B_CLKOUT output clocks respectively. 338c2ecf20Sopenharmony_ci 348c2ecf20Sopenharmony_ciThe pinctrl bindings defined in ../pinctrl/pinctrl-bindings.txt must be used 358c2ecf20Sopenharmony_cito define a required pinctrl state named "default" and optional pinctrl states: 368c2ecf20Sopenharmony_ci"idle", "active-a", active-b". These optional states can be used to switch the 378c2ecf20Sopenharmony_cicamera port pinmux at runtime. The "idle" state should configure both the camera 388c2ecf20Sopenharmony_ciports A and B into high impedance state, especially the CAMCLK clock output 398c2ecf20Sopenharmony_cishould be inactive. For the "active-a" state the camera port A must be activated 408c2ecf20Sopenharmony_ciand the port B deactivated and for the state "active-b" it should be the other 418c2ecf20Sopenharmony_ciway around. 428c2ecf20Sopenharmony_ci 438c2ecf20Sopenharmony_ciThe 'camera' node must include at least one 'fimc' child node. 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ci'fimc' device nodes 478c2ecf20Sopenharmony_ci------------------- 488c2ecf20Sopenharmony_ci 498c2ecf20Sopenharmony_ciRequired properties: 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_ci- compatible: "samsung,s5pv210-fimc" for S5PV210, "samsung,exynos4210-fimc" 528c2ecf20Sopenharmony_ci for Exynos4210 and "samsung,exynos4212-fimc" for Exynos4x12 SoCs; 538c2ecf20Sopenharmony_ci- reg: physical base address and length of the registers set for the device; 548c2ecf20Sopenharmony_ci- interrupts: should contain FIMC interrupt; 558c2ecf20Sopenharmony_ci- clocks: list of clock specifiers, must contain an entry for each required 568c2ecf20Sopenharmony_ci entry in clock-names; 578c2ecf20Sopenharmony_ci- clock-names: must contain "fimc", "sclk_fimc" entries. 588c2ecf20Sopenharmony_ci- samsung,pix-limits: an array of maximum supported image sizes in pixels, for 598c2ecf20Sopenharmony_ci details refer to Table 2-1 in the S5PV210 SoC User Manual; The meaning of 608c2ecf20Sopenharmony_ci each cell is as follows: 618c2ecf20Sopenharmony_ci 0 - scaler input horizontal size, 628c2ecf20Sopenharmony_ci 1 - input horizontal size for the scaler bypassed, 638c2ecf20Sopenharmony_ci 2 - REAL_WIDTH without input rotation, 648c2ecf20Sopenharmony_ci 3 - REAL_HEIGHT with input rotation, 658c2ecf20Sopenharmony_ci- samsung,sysreg: a phandle to the SYSREG node. 668c2ecf20Sopenharmony_ci 678c2ecf20Sopenharmony_ciEach FIMC device should have an alias in the aliases node, in the form of 688c2ecf20Sopenharmony_cifimc<n>, where <n> is an integer specifying the IP block instance. 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_ciOptional properties: 718c2ecf20Sopenharmony_ci 728c2ecf20Sopenharmony_ci- clock-frequency: maximum FIMC local clock (LCLK) frequency; 738c2ecf20Sopenharmony_ci- samsung,min-pix-sizes: an array specyfing minimum image size in pixels at 748c2ecf20Sopenharmony_ci the FIMC input and output DMA, in the first and second cell respectively. 758c2ecf20Sopenharmony_ci Default value when this property is not present is <16 16>; 768c2ecf20Sopenharmony_ci- samsung,min-pix-alignment: minimum supported image height alignment (first 778c2ecf20Sopenharmony_ci cell) and the horizontal image offset (second cell). The values are in pixels 788c2ecf20Sopenharmony_ci and default to <2 1> when this property is not present; 798c2ecf20Sopenharmony_ci- samsung,mainscaler-ext: a boolean property indicating whether the FIMC IP 808c2ecf20Sopenharmony_ci supports extended image size and has CIEXTEN register; 818c2ecf20Sopenharmony_ci- samsung,rotators: a bitmask specifying whether this IP has the input and 828c2ecf20Sopenharmony_ci the output rotator. Bits 4 and 0 correspond to input and output rotator 838c2ecf20Sopenharmony_ci respectively. If a rotator is present its corresponding bit should be set. 848c2ecf20Sopenharmony_ci Default value when this property is not specified is 0x11. 858c2ecf20Sopenharmony_ci- samsung,cam-if: a bolean property indicating whether the IP block includes 868c2ecf20Sopenharmony_ci the camera input interface. 878c2ecf20Sopenharmony_ci- samsung,isp-wb: this property must be present if the IP block has the ISP 888c2ecf20Sopenharmony_ci writeback input. 898c2ecf20Sopenharmony_ci- samsung,lcd-wb: this property must be present if the IP block has the LCD 908c2ecf20Sopenharmony_ci writeback input. 918c2ecf20Sopenharmony_ci 928c2ecf20Sopenharmony_ci 938c2ecf20Sopenharmony_ci'parallel-ports' node 948c2ecf20Sopenharmony_ci--------------------- 958c2ecf20Sopenharmony_ci 968c2ecf20Sopenharmony_ciThis node should contain child 'port' nodes specifying active parallel video 978c2ecf20Sopenharmony_ciinput ports. It includes camera A and camera B inputs. 'reg' property in the 988c2ecf20Sopenharmony_ciport nodes specifies data input - 1, 2 indicates input A, B respectively. 998c2ecf20Sopenharmony_ci 1008c2ecf20Sopenharmony_ciOptional properties 1018c2ecf20Sopenharmony_ci 1028c2ecf20Sopenharmony_ci- samsung,camclk-out (deprecated) : specifies clock output for remote sensor, 1038c2ecf20Sopenharmony_ci 0 - CAM_A_CLKOUT, 1 - CAM_B_CLKOUT; 1048c2ecf20Sopenharmony_ci 1058c2ecf20Sopenharmony_ciImage sensor nodes 1068c2ecf20Sopenharmony_ci------------------ 1078c2ecf20Sopenharmony_ci 1088c2ecf20Sopenharmony_ciThe sensor device nodes should be added to their control bus controller (e.g. 1098c2ecf20Sopenharmony_ciI2C0) nodes and linked to a port node in the csis or the parallel-ports node, 1108c2ecf20Sopenharmony_ciusing the common video interfaces bindings, defined in video-interfaces.txt. 1118c2ecf20Sopenharmony_ci 1128c2ecf20Sopenharmony_ciExample: 1138c2ecf20Sopenharmony_ci 1148c2ecf20Sopenharmony_ci aliases { 1158c2ecf20Sopenharmony_ci fimc0 = &fimc_0; 1168c2ecf20Sopenharmony_ci }; 1178c2ecf20Sopenharmony_ci 1188c2ecf20Sopenharmony_ci /* Parallel bus IF sensor */ 1198c2ecf20Sopenharmony_ci i2c_0: i2c@13860000 { 1208c2ecf20Sopenharmony_ci s5k6aa: sensor@3c { 1218c2ecf20Sopenharmony_ci compatible = "samsung,s5k6aafx"; 1228c2ecf20Sopenharmony_ci reg = <0x3c>; 1238c2ecf20Sopenharmony_ci vddio-supply = <...>; 1248c2ecf20Sopenharmony_ci 1258c2ecf20Sopenharmony_ci clock-frequency = <24000000>; 1268c2ecf20Sopenharmony_ci clocks = <&camera 1>; 1278c2ecf20Sopenharmony_ci clock-names = "mclk"; 1288c2ecf20Sopenharmony_ci 1298c2ecf20Sopenharmony_ci port { 1308c2ecf20Sopenharmony_ci s5k6aa_ep: endpoint { 1318c2ecf20Sopenharmony_ci remote-endpoint = <&fimc0_ep>; 1328c2ecf20Sopenharmony_ci bus-width = <8>; 1338c2ecf20Sopenharmony_ci hsync-active = <0>; 1348c2ecf20Sopenharmony_ci vsync-active = <1>; 1358c2ecf20Sopenharmony_ci pclk-sample = <1>; 1368c2ecf20Sopenharmony_ci }; 1378c2ecf20Sopenharmony_ci }; 1388c2ecf20Sopenharmony_ci }; 1398c2ecf20Sopenharmony_ci 1408c2ecf20Sopenharmony_ci /* MIPI CSI-2 bus IF sensor */ 1418c2ecf20Sopenharmony_ci s5c73m3: sensor@1a { 1428c2ecf20Sopenharmony_ci compatible = "samsung,s5c73m3"; 1438c2ecf20Sopenharmony_ci reg = <0x1a>; 1448c2ecf20Sopenharmony_ci vddio-supply = <...>; 1458c2ecf20Sopenharmony_ci 1468c2ecf20Sopenharmony_ci clock-frequency = <24000000>; 1478c2ecf20Sopenharmony_ci clocks = <&camera 0>; 1488c2ecf20Sopenharmony_ci clock-names = "mclk"; 1498c2ecf20Sopenharmony_ci 1508c2ecf20Sopenharmony_ci port { 1518c2ecf20Sopenharmony_ci s5c73m3_1: endpoint { 1528c2ecf20Sopenharmony_ci data-lanes = <1 2 3 4>; 1538c2ecf20Sopenharmony_ci remote-endpoint = <&csis0_ep>; 1548c2ecf20Sopenharmony_ci }; 1558c2ecf20Sopenharmony_ci }; 1568c2ecf20Sopenharmony_ci }; 1578c2ecf20Sopenharmony_ci }; 1588c2ecf20Sopenharmony_ci 1598c2ecf20Sopenharmony_ci camera { 1608c2ecf20Sopenharmony_ci compatible = "samsung,fimc", "simple-bus"; 1618c2ecf20Sopenharmony_ci clocks = <&clock 132>, <&clock 133>, <&clock 351>, 1628c2ecf20Sopenharmony_ci <&clock 352>; 1638c2ecf20Sopenharmony_ci clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", 1648c2ecf20Sopenharmony_ci "pxl_async1"; 1658c2ecf20Sopenharmony_ci #clock-cells = <1>; 1668c2ecf20Sopenharmony_ci clock-output-names = "cam_a_clkout", "cam_b_clkout"; 1678c2ecf20Sopenharmony_ci pinctrl-names = "default"; 1688c2ecf20Sopenharmony_ci pinctrl-0 = <&cam_port_a_clk_active>; 1698c2ecf20Sopenharmony_ci #address-cells = <1>; 1708c2ecf20Sopenharmony_ci #size-cells = <1>; 1718c2ecf20Sopenharmony_ci 1728c2ecf20Sopenharmony_ci /* parallel camera ports */ 1738c2ecf20Sopenharmony_ci parallel-ports { 1748c2ecf20Sopenharmony_ci /* camera A input */ 1758c2ecf20Sopenharmony_ci port@1 { 1768c2ecf20Sopenharmony_ci reg = <1>; 1778c2ecf20Sopenharmony_ci fimc0_ep: endpoint { 1788c2ecf20Sopenharmony_ci remote-endpoint = <&s5k6aa_ep>; 1798c2ecf20Sopenharmony_ci bus-width = <8>; 1808c2ecf20Sopenharmony_ci hsync-active = <0>; 1818c2ecf20Sopenharmony_ci vsync-active = <1>; 1828c2ecf20Sopenharmony_ci pclk-sample = <1>; 1838c2ecf20Sopenharmony_ci }; 1848c2ecf20Sopenharmony_ci }; 1858c2ecf20Sopenharmony_ci }; 1868c2ecf20Sopenharmony_ci 1878c2ecf20Sopenharmony_ci fimc_0: fimc@11800000 { 1888c2ecf20Sopenharmony_ci compatible = "samsung,exynos4210-fimc"; 1898c2ecf20Sopenharmony_ci reg = <0x11800000 0x1000>; 1908c2ecf20Sopenharmony_ci interrupts = <0 85 0>; 1918c2ecf20Sopenharmony_ci }; 1928c2ecf20Sopenharmony_ci 1938c2ecf20Sopenharmony_ci csis_0: csis@11880000 { 1948c2ecf20Sopenharmony_ci compatible = "samsung,exynos4210-csis"; 1958c2ecf20Sopenharmony_ci reg = <0x11880000 0x1000>; 1968c2ecf20Sopenharmony_ci interrupts = <0 78 0>; 1978c2ecf20Sopenharmony_ci /* camera C input */ 1988c2ecf20Sopenharmony_ci port@3 { 1998c2ecf20Sopenharmony_ci reg = <3>; 2008c2ecf20Sopenharmony_ci csis0_ep: endpoint { 2018c2ecf20Sopenharmony_ci remote-endpoint = <&s5c73m3_ep>; 2028c2ecf20Sopenharmony_ci data-lanes = <1 2 3 4>; 2038c2ecf20Sopenharmony_ci samsung,csis-hs-settle = <12>; 2048c2ecf20Sopenharmony_ci }; 2058c2ecf20Sopenharmony_ci }; 2068c2ecf20Sopenharmony_ci }; 2078c2ecf20Sopenharmony_ci }; 2088c2ecf20Sopenharmony_ci 2098c2ecf20Sopenharmony_ciThe MIPI-CSIS device binding is defined in samsung-mipi-csis.txt. 210