18c2ecf20Sopenharmony_ci* Renesas JPEG Processing Unit 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThe JPEG processing unit (JPU) incorporates the JPEG codec with an encoding 48c2ecf20Sopenharmony_ciand decoding function conforming to the JPEG baseline process, so that the JPU 58c2ecf20Sopenharmony_cican encode image data and decode JPEG data quickly. 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ciRequired properties: 88c2ecf20Sopenharmony_ci- compatible: "renesas,jpu-<soctype>", "renesas,rcar-gen2-jpu" as fallback. 98c2ecf20Sopenharmony_ci Examples with soctypes are: 108c2ecf20Sopenharmony_ci - "renesas,jpu-r8a7790" for R-Car H2 118c2ecf20Sopenharmony_ci - "renesas,jpu-r8a7791" for R-Car M2-W 128c2ecf20Sopenharmony_ci - "renesas,jpu-r8a7792" for R-Car V2H 138c2ecf20Sopenharmony_ci - "renesas,jpu-r8a7793" for R-Car M2-N 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ci - reg: Base address and length of the registers block for the JPU. 168c2ecf20Sopenharmony_ci - interrupts: JPU interrupt specifier. 178c2ecf20Sopenharmony_ci - clocks: A phandle + clock-specifier pair for the JPU functional clock. 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ciExample: R8A7790 (R-Car H2) JPU node 208c2ecf20Sopenharmony_ci jpeg-codec@fe980000 { 218c2ecf20Sopenharmony_ci compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu"; 228c2ecf20Sopenharmony_ci reg = <0 0xfe980000 0 0x10300>; 238c2ecf20Sopenharmony_ci interrupts = <0 272 IRQ_TYPE_LEVEL_HIGH>; 248c2ecf20Sopenharmony_ci clocks = <&mstp1_clks R8A7790_CLK_JPU>; 258c2ecf20Sopenharmony_ci }; 26