18c2ecf20Sopenharmony_ciRenesas R-Car Image Renderer (Distortion Correction Engine) 28c2ecf20Sopenharmony_ci----------------------------------------------------------- 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ciThe image renderer, or the distortion correction engine, is a drawing processor 58c2ecf20Sopenharmony_ciwith a simple instruction system capable of referencing video capture data or 68c2ecf20Sopenharmony_cidata in an external memory as 2D texture data and performing texture mapping 78c2ecf20Sopenharmony_ciand drawing with respect to any shape that is split into triangular objects. 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ciRequired properties: 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci- compatible: "renesas,<soctype>-imr-lx4", "renesas,imr-lx4" as a fallback for 128c2ecf20Sopenharmony_ci the image renderer light extended 4 (IMR-LX4) found in the R-Car gen3 SoCs, 138c2ecf20Sopenharmony_ci where the examples with <soctype> are: 148c2ecf20Sopenharmony_ci - "renesas,r8a7795-imr-lx4" for R-Car H3, 158c2ecf20Sopenharmony_ci - "renesas,r8a7796-imr-lx4" for R-Car M3-W. 168c2ecf20Sopenharmony_ci- reg: offset and length of the register block; 178c2ecf20Sopenharmony_ci- interrupts: single interrupt specifier; 188c2ecf20Sopenharmony_ci- clocks: single clock phandle/specifier pair; 198c2ecf20Sopenharmony_ci- power-domains: power domain phandle/specifier pair; 208c2ecf20Sopenharmony_ci- resets: reset phandle/specifier pair. 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ciExample: 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci imr-lx4@fe860000 { 258c2ecf20Sopenharmony_ci compatible = "renesas,r8a7795-imr-lx4", "renesas,imr-lx4"; 268c2ecf20Sopenharmony_ci reg = <0 0xfe860000 0 0x2000>; 278c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 288c2ecf20Sopenharmony_ci clocks = <&cpg CPG_MOD 823>; 298c2ecf20Sopenharmony_ci power-domains = <&sysc R8A7795_PD_A3VC>; 308c2ecf20Sopenharmony_ci resets = <&cpg 823>; 318c2ecf20Sopenharmony_ci }; 32