18c2ecf20Sopenharmony_ci* Mediatek Video Processor Unit 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciVideo Processor Unit is a HW video controller. It controls HW Codec including 48c2ecf20Sopenharmony_ciH.264/VP8/VP9 Decode, H.264/VP8 Encode and Image Processor (scale/rotate/color convert). 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ciRequired properties: 78c2ecf20Sopenharmony_ci - compatible: "mediatek,mt8173-vpu" 88c2ecf20Sopenharmony_ci - reg: Must contain an entry for each entry in reg-names. 98c2ecf20Sopenharmony_ci - reg-names: Must include the following entries: 108c2ecf20Sopenharmony_ci "tcm": tcm base 118c2ecf20Sopenharmony_ci "cfg_reg": Main configuration registers base 128c2ecf20Sopenharmony_ci - interrupts: interrupt number to the cpu. 138c2ecf20Sopenharmony_ci - clocks : clock name from clock manager 148c2ecf20Sopenharmony_ci - clock-names: must be main. It is the main clock of VPU 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ciOptional properties: 178c2ecf20Sopenharmony_ci - memory-region: phandle to a node describing memory (see 188c2ecf20Sopenharmony_ci Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt) 198c2ecf20Sopenharmony_ci to be used for VPU extended memory; if not present, VPU may be located 208c2ecf20Sopenharmony_ci anywhere in the memory 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ciExample: 238c2ecf20Sopenharmony_ci vpu: vpu@10020000 { 248c2ecf20Sopenharmony_ci compatible = "mediatek,mt8173-vpu"; 258c2ecf20Sopenharmony_ci reg = <0 0x10020000 0 0x30000>, 268c2ecf20Sopenharmony_ci <0 0x10050000 0 0x100>; 278c2ecf20Sopenharmony_ci reg-names = "tcm", "cfg_reg"; 288c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 298c2ecf20Sopenharmony_ci clocks = <&topckgen TOP_SCP_SEL>; 308c2ecf20Sopenharmony_ci clock-names = "main"; 318c2ecf20Sopenharmony_ci }; 32