18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
28c2ecf20Sopenharmony_ci%YAML 1.2
38c2ecf20Sopenharmony_ci---
48c2ecf20Sopenharmony_ci$id: "http://devicetree.org/schemas/media/i2c/chrontel,ch7322.yaml#"
58c2ecf20Sopenharmony_ci$schema: "http://devicetree.org/meta-schemas/core.yaml#"
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_cititle: Chrontel HDMI-CEC Controller
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_cimaintainers:
108c2ecf20Sopenharmony_ci  - Jeff Chase <jnchase@google.com>
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_cidescription:
138c2ecf20Sopenharmony_ci  The Chrontel CH7322 is a discrete HDMI-CEC controller. It is
148c2ecf20Sopenharmony_ci  programmable through I2C and drives a single CEC line.
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ciproperties:
178c2ecf20Sopenharmony_ci  compatible:
188c2ecf20Sopenharmony_ci    const: chrontel,ch7322
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ci  reg:
218c2ecf20Sopenharmony_ci    description: I2C device address
228c2ecf20Sopenharmony_ci    maxItems: 1
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_ci  clocks:
258c2ecf20Sopenharmony_ci    maxItems: 1
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci  interrupts:
288c2ecf20Sopenharmony_ci    maxItems: 1
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_ci  reset-gpios:
318c2ecf20Sopenharmony_ci    description:
328c2ecf20Sopenharmony_ci      Reference to the GPIO connected to the RESET pin, if any. This
338c2ecf20Sopenharmony_ci      pin is active-low.
348c2ecf20Sopenharmony_ci    maxItems: 1
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_ci  standby-gpios:
378c2ecf20Sopenharmony_ci    description:
388c2ecf20Sopenharmony_ci      Reference to the GPIO connected to the OE pin, if any. When low
398c2ecf20Sopenharmony_ci      the device will respond to power status requests with "standby"
408c2ecf20Sopenharmony_ci      if in auto mode.
418c2ecf20Sopenharmony_ci    maxItems: 1
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ci  # see ../cec.txt
448c2ecf20Sopenharmony_ci  hdmi-phandle:
458c2ecf20Sopenharmony_ci    description: phandle to the HDMI controller
468c2ecf20Sopenharmony_ci
478c2ecf20Sopenharmony_cirequired:
488c2ecf20Sopenharmony_ci  - compatible
498c2ecf20Sopenharmony_ci  - reg
508c2ecf20Sopenharmony_ci  - interrupts
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_ciadditionalProperties: false
538c2ecf20Sopenharmony_ci
548c2ecf20Sopenharmony_ciexamples:
558c2ecf20Sopenharmony_ci  - |
568c2ecf20Sopenharmony_ci    #include <dt-bindings/gpio/gpio.h>
578c2ecf20Sopenharmony_ci    #include <dt-bindings/interrupt-controller/irq.h>
588c2ecf20Sopenharmony_ci    i2c {
598c2ecf20Sopenharmony_ci      #address-cells = <1>;
608c2ecf20Sopenharmony_ci      #size-cells = <0>;
618c2ecf20Sopenharmony_ci      ch7322@75 {
628c2ecf20Sopenharmony_ci        compatible = "chrontel,ch7322";
638c2ecf20Sopenharmony_ci        reg = <0x75>;
648c2ecf20Sopenharmony_ci        interrupts = <47 IRQ_TYPE_EDGE_RISING>;
658c2ecf20Sopenharmony_ci        standby-gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
668c2ecf20Sopenharmony_ci        reset-gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
678c2ecf20Sopenharmony_ci        hdmi-phandle = <&hdmi>;
688c2ecf20Sopenharmony_ci      };
698c2ecf20Sopenharmony_ci    };
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