18c2ecf20Sopenharmony_ciExynos4x12 SoC series Imaging Subsystem (FIMC-IS)
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciThe FIMC-IS is a subsystem for processing image signal from an image sensor.
48c2ecf20Sopenharmony_ciThe Exynos4x12 SoC series FIMC-IS V1.5 comprises of a dedicated ARM Cortex-A5
58c2ecf20Sopenharmony_ciprocessor, ISP, DRC and FD IP blocks and peripheral devices such as UART, I2C
68c2ecf20Sopenharmony_ciand SPI bus controllers, PWM and ADC.
78c2ecf20Sopenharmony_ci
88c2ecf20Sopenharmony_cifimc-is node
98c2ecf20Sopenharmony_ci------------
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ciRequired properties:
128c2ecf20Sopenharmony_ci- compatible	: should be "samsung,exynos4212-fimc-is" for Exynos4212 and
138c2ecf20Sopenharmony_ci		  Exynos4412 SoCs;
148c2ecf20Sopenharmony_ci- reg		: physical base address and length of the registers set;
158c2ecf20Sopenharmony_ci- interrupts	: must contain two FIMC-IS interrupts, in order: ISP0, ISP1;
168c2ecf20Sopenharmony_ci- clocks	: list of clock specifiers, corresponding to entries in
178c2ecf20Sopenharmony_ci		  clock-names property;
188c2ecf20Sopenharmony_ci- clock-names	: must contain "ppmuispx", "ppmuispx", "lite0", "lite1"
198c2ecf20Sopenharmony_ci		  "mpll", "sysreg", "isp", "drc", "fd", "mcuisp", "gicisp",
208c2ecf20Sopenharmony_ci		  "pwm_isp", "mcuctl_isp", "uart", "ispdiv0", "ispdiv1",
218c2ecf20Sopenharmony_ci		  "mcuispdiv0", "mcuispdiv1", "aclk200", "div_aclk200",
228c2ecf20Sopenharmony_ci		  "aclk400mcuisp", "div_aclk400mcuisp" entries,
238c2ecf20Sopenharmony_ci		  matching entries in the clocks property.
248c2ecf20Sopenharmony_cipmu subnode
258c2ecf20Sopenharmony_ci-----------
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ciRequired properties:
288c2ecf20Sopenharmony_ci - reg : must contain PMU physical base address and size of the register set.
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_ciThe following are the FIMC-IS peripheral device nodes and can be specified
318c2ecf20Sopenharmony_cieither standalone or as the fimc-is node child nodes.
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_cii2c-isp (ISP I2C bus controller) nodes
348c2ecf20Sopenharmony_ci------------------------------------------
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_ciRequired properties:
378c2ecf20Sopenharmony_ci
388c2ecf20Sopenharmony_ci- compatible	: should be "samsung,exynos4212-i2c-isp" for Exynos4212 and
398c2ecf20Sopenharmony_ci		  Exynos4412 SoCs;
408c2ecf20Sopenharmony_ci- reg		: physical base address and length of the registers set;
418c2ecf20Sopenharmony_ci- clocks	: must contain gate clock specifier for this controller;
428c2ecf20Sopenharmony_ci- clock-names	: must contain "i2c_isp" entry.
438c2ecf20Sopenharmony_ci
448c2ecf20Sopenharmony_ciFor the above nodes it is required to specify a pinctrl state named "default",
458c2ecf20Sopenharmony_ciaccording to the pinctrl bindings defined in ../pinctrl/pinctrl-bindings.txt.
468c2ecf20Sopenharmony_ci
478c2ecf20Sopenharmony_ciDevice tree nodes of the image sensors' controlled directly by the FIMC-IS
488c2ecf20Sopenharmony_cifirmware must be child nodes of their corresponding ISP I2C bus controller node.
498c2ecf20Sopenharmony_ciThe data link of these image sensors must be specified using the common video
508c2ecf20Sopenharmony_ciinterfaces bindings, defined in video-interfaces.txt.
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