18c2ecf20Sopenharmony_ciThe APM X-Gene SLIMpro mailbox is used to communicate messages between 28c2ecf20Sopenharmony_cithe ARM64 processors and the Cortex M3 (dubbed SLIMpro). It uses a simple 38c2ecf20Sopenharmony_ciinterrupt based door bell mechanism and can exchange simple messages using the 48c2ecf20Sopenharmony_ciinternal registers. 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ciThere are total of 8 interrupts in this mailbox. Each used for an individual 78c2ecf20Sopenharmony_cidoor bell (or mailbox channel). 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ciRequired properties: 108c2ecf20Sopenharmony_ci- compatible: Should be as "apm,xgene-slimpro-mbox". 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ci- reg: Contains the mailbox register address range. 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ci- interrupts: 8 interrupts must be from 0 to 7, interrupt 0 define the 158c2ecf20Sopenharmony_ci the interrupt for mailbox channel 0 and interrupt 1 for 168c2ecf20Sopenharmony_ci mailbox channel 1 and so likewise for the reminder. 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci- #mbox-cells: only one to specify the mailbox channel number. 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ciExample: 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ciMailbox Node: 238c2ecf20Sopenharmony_ci mailbox: mailbox@10540000 { 248c2ecf20Sopenharmony_ci compatible = "apm,xgene-slimpro-mbox"; 258c2ecf20Sopenharmony_ci reg = <0x0 0x10540000 0x0 0xa000>; 268c2ecf20Sopenharmony_ci #mbox-cells = <1>; 278c2ecf20Sopenharmony_ci interrupts = <0x0 0x0 0x4>, 288c2ecf20Sopenharmony_ci <0x0 0x1 0x4>, 298c2ecf20Sopenharmony_ci <0x0 0x2 0x4>, 308c2ecf20Sopenharmony_ci <0x0 0x3 0x4>, 318c2ecf20Sopenharmony_ci <0x0 0x4 0x4>, 328c2ecf20Sopenharmony_ci <0x0 0x5 0x4>, 338c2ecf20Sopenharmony_ci <0x0 0x6 0x4>, 348c2ecf20Sopenharmony_ci <0x0 0x7 0x4>, 358c2ecf20Sopenharmony_ci }; 36