xref: /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mailbox/allwinner,sun6i-a31-msgbox.yaml

# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/mailbox/allwinner,sun6i-a31-msgbox.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Allwinner sunxi Message Box

maintainers:
  - Samuel Holland <samuel@sholland.org>

description: |
  The hardware message box on sun6i, sun8i, sun9i, and sun50i SoCs is a
  two-user mailbox controller containing 8 unidirectional FIFOs. An interrupt
  is raised for received messages, but software must poll to know when a
  transmitted message has been acknowledged by the remote user. Each FIFO can
  hold four 32-bit messages; when a FIFO is full, clients must wait before
  attempting more transmissions.

  Refer to ./mailbox.txt for generic information about mailbox device-tree
  bindings.

properties:
  compatible:
    oneOf:
      - items:
          - enum:
              - allwinner,sun8i-a83t-msgbox
              - allwinner,sun8i-h3-msgbox
              - allwinner,sun9i-a80-msgbox
              - allwinner,sun50i-a64-msgbox
              - allwinner,sun50i-h6-msgbox
          - const: allwinner,sun6i-a31-msgbox
      - const: allwinner,sun6i-a31-msgbox

  reg:
    maxItems: 1

  clocks:
    maxItems: 1
    description: bus clock

  resets:
    maxItems: 1
    description: bus reset

  interrupts:
    maxItems: 1

  '#mbox-cells':
    const: 1
    description: first cell is the channel number (0-7)

required:
  - compatible
  - reg
  - clocks
  - resets
  - interrupts
  - '#mbox-cells'

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/sun8i-h3-ccu.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/reset/sun8i-h3-ccu.h>

    msgbox: mailbox@1c17000 {
            compatible = "allwinner,sun8i-h3-msgbox",
                         "allwinner,sun6i-a31-msgbox";
            reg = <0x01c17000 0x1000>;
            clocks = <&ccu CLK_BUS_MSGBOX>;
            resets = <&ccu RST_BUS_MSGBOX>;
            interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
            #mbox-cells = <1>;
    };

...