18c2ecf20Sopenharmony_ciRockchip IOMMU 28c2ecf20Sopenharmony_ci============== 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ciA Rockchip DRM iommu translates io virtual addresses to physical addresses for 58c2ecf20Sopenharmony_ciits master device. Each slave device is bound to a single master device, and 68c2ecf20Sopenharmony_cishares its clocks, power domain and irq. 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ciRequired properties: 98c2ecf20Sopenharmony_ci- compatible : Should be "rockchip,iommu" 108c2ecf20Sopenharmony_ci- reg : Address space for the configuration registers 118c2ecf20Sopenharmony_ci- interrupts : Interrupt specifier for the IOMMU instance 128c2ecf20Sopenharmony_ci- interrupt-names : Interrupt name for the IOMMU instance 138c2ecf20Sopenharmony_ci- #iommu-cells : Should be <0>. This indicates the iommu is a 148c2ecf20Sopenharmony_ci "single-master" device, and needs no additional information 158c2ecf20Sopenharmony_ci to associate with its master device. See: 168c2ecf20Sopenharmony_ci Documentation/devicetree/bindings/iommu/iommu.txt 178c2ecf20Sopenharmony_ci- clocks : A list of clocks required for the IOMMU to be accessible by 188c2ecf20Sopenharmony_ci the host CPU. 198c2ecf20Sopenharmony_ci- clock-names : Should contain the following: 208c2ecf20Sopenharmony_ci "iface" - Main peripheral bus clock (PCLK/HCL) (required) 218c2ecf20Sopenharmony_ci "aclk" - AXI bus clock (required) 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ciOptional properties: 248c2ecf20Sopenharmony_ci- rockchip,disable-mmu-reset : Don't use the mmu reset operation. 258c2ecf20Sopenharmony_ci Some mmu instances may produce unexpected results 268c2ecf20Sopenharmony_ci when the reset operation is used. 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ciExample: 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci vopl_mmu: iommu@ff940300 { 318c2ecf20Sopenharmony_ci compatible = "rockchip,iommu"; 328c2ecf20Sopenharmony_ci reg = <0xff940300 0x100>; 338c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 348c2ecf20Sopenharmony_ci interrupt-names = "vopl_mmu"; 358c2ecf20Sopenharmony_ci clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; 368c2ecf20Sopenharmony_ci clock-names = "aclk", "iface"; 378c2ecf20Sopenharmony_ci #iommu-cells = <0>; 388c2ecf20Sopenharmony_ci }; 39