18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
28c2ecf20Sopenharmony_ci%YAML 1.2
38c2ecf20Sopenharmony_ci---
48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/interrupt-controller/ti,sci-inta.yaml#
58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_cititle: Texas Instruments K3 Interrupt Aggregator
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_cimaintainers:
108c2ecf20Sopenharmony_ci  - Lokesh Vutla <lokeshvutla@ti.com>
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_ciallOf:
138c2ecf20Sopenharmony_ci  - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_cidescription: |
168c2ecf20Sopenharmony_ci  The Interrupt Aggregator (INTA) provides a centralized machine
178c2ecf20Sopenharmony_ci  which handles the termination of system events to that they can
188c2ecf20Sopenharmony_ci  be coherently processed by the host(s) in the system. A maximum
198c2ecf20Sopenharmony_ci  of 64 events can be mapped to a single interrupt.
208c2ecf20Sopenharmony_ci
218c2ecf20Sopenharmony_ci                                Interrupt Aggregator
228c2ecf20Sopenharmony_ci                       +-----------------------------------------+
238c2ecf20Sopenharmony_ci                       |      Intmap            VINT             |
248c2ecf20Sopenharmony_ci                       | +--------------+  +------------+        |
258c2ecf20Sopenharmony_ci              m ------>| | vint  | bit  |  | 0 |.....|63| vint0  |
268c2ecf20Sopenharmony_ci                 .     | +--------------+  +------------+        |      +------+
278c2ecf20Sopenharmony_ci                 .     |         .               .               |      | HOST |
288c2ecf20Sopenharmony_ci  Globalevents  ------>|         .               .               |----->| IRQ  |
298c2ecf20Sopenharmony_ci                 .     |         .               .               |      | CTRL |
308c2ecf20Sopenharmony_ci                 .     |         .               .               |      +------+
318c2ecf20Sopenharmony_ci              n ------>| +--------------+  +------------+        |
328c2ecf20Sopenharmony_ci                       | | vint  | bit  |  | 0 |.....|63| vintx  |
338c2ecf20Sopenharmony_ci                       | +--------------+  +------------+        |
348c2ecf20Sopenharmony_ci                       |                                         |
358c2ecf20Sopenharmony_ci                       |      Unmap                              |
368c2ecf20Sopenharmony_ci                       | +--------------+                        |
378c2ecf20Sopenharmony_ci  Unmapped events ---->| |   umapidx    |-------------------------> Globalevents
388c2ecf20Sopenharmony_ci                       | +--------------+                        |
398c2ecf20Sopenharmony_ci                       |                                         |
408c2ecf20Sopenharmony_ci                       +-----------------------------------------+
418c2ecf20Sopenharmony_ci
428c2ecf20Sopenharmony_ci  Configuration of these Intmap registers that maps global events to vint is
438c2ecf20Sopenharmony_ci  done by a system controller (like the Device Memory and Security Controller
448c2ecf20Sopenharmony_ci  on AM654 SoC). Driver should request the system controller to get the range
458c2ecf20Sopenharmony_ci  of global events and vints assigned to the requesting host. Management
468c2ecf20Sopenharmony_ci  of these requested resources should be handled by driver and requests
478c2ecf20Sopenharmony_ci  system controller to map specific global event to vint, bit pair.
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_ci  Communication between the host processor running an OS and the system
508c2ecf20Sopenharmony_ci  controller happens through a protocol called TI System Control Interface
518c2ecf20Sopenharmony_ci  (TISCI protocol).
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_ciproperties:
548c2ecf20Sopenharmony_ci  compatible:
558c2ecf20Sopenharmony_ci    const: ti,sci-inta
568c2ecf20Sopenharmony_ci
578c2ecf20Sopenharmony_ci  reg:
588c2ecf20Sopenharmony_ci    maxItems: 1
598c2ecf20Sopenharmony_ci
608c2ecf20Sopenharmony_ci  interrupt-controller: true
618c2ecf20Sopenharmony_ci
628c2ecf20Sopenharmony_ci  msi-controller: true
638c2ecf20Sopenharmony_ci
648c2ecf20Sopenharmony_ci  ti,interrupt-ranges:
658c2ecf20Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/uint32-matrix
668c2ecf20Sopenharmony_ci    description: |
678c2ecf20Sopenharmony_ci      Interrupt ranges that converts the INTA output hw irq numbers
688c2ecf20Sopenharmony_ci      to parents's input interrupt numbers.
698c2ecf20Sopenharmony_ci    items:
708c2ecf20Sopenharmony_ci      items:
718c2ecf20Sopenharmony_ci        - description: |
728c2ecf20Sopenharmony_ci            "output_irq" specifies the base for inta output irq
738c2ecf20Sopenharmony_ci        - description: |
748c2ecf20Sopenharmony_ci            "parent's input irq" specifies the base for parent irq
758c2ecf20Sopenharmony_ci        - description: |
768c2ecf20Sopenharmony_ci            "limit" specifies the limit for translation
778c2ecf20Sopenharmony_ci
788c2ecf20Sopenharmony_ci  ti,unmapped-event-sources:
798c2ecf20Sopenharmony_ci    $ref: /schemas/types.yaml#definitions/phandle-array
808c2ecf20Sopenharmony_ci    description:
818c2ecf20Sopenharmony_ci      Array of phandles to DMA controllers where the unmapped events originate.
828c2ecf20Sopenharmony_ci
838c2ecf20Sopenharmony_cirequired:
848c2ecf20Sopenharmony_ci  - compatible
858c2ecf20Sopenharmony_ci  - reg
868c2ecf20Sopenharmony_ci  - interrupt-controller
878c2ecf20Sopenharmony_ci  - msi-controller
888c2ecf20Sopenharmony_ci  - ti,sci
898c2ecf20Sopenharmony_ci  - ti,sci-dev-id
908c2ecf20Sopenharmony_ci  - ti,interrupt-ranges
918c2ecf20Sopenharmony_ci
928c2ecf20Sopenharmony_ciunevaluatedProperties: false
938c2ecf20Sopenharmony_ci
948c2ecf20Sopenharmony_ciexamples:
958c2ecf20Sopenharmony_ci  - |
968c2ecf20Sopenharmony_ci    bus {
978c2ecf20Sopenharmony_ci        #address-cells = <2>;
988c2ecf20Sopenharmony_ci        #size-cells = <2>;
998c2ecf20Sopenharmony_ci
1008c2ecf20Sopenharmony_ci        main_udmass_inta: msi-controller@33d00000 {
1018c2ecf20Sopenharmony_ci            compatible = "ti,sci-inta";
1028c2ecf20Sopenharmony_ci            reg = <0x0 0x33d00000 0x0 0x100000>;
1038c2ecf20Sopenharmony_ci            interrupt-controller;
1048c2ecf20Sopenharmony_ci            msi-controller;
1058c2ecf20Sopenharmony_ci            interrupt-parent = <&main_navss_intr>;
1068c2ecf20Sopenharmony_ci            ti,sci = <&dmsc>;
1078c2ecf20Sopenharmony_ci            ti,sci-dev-id = <179>;
1088c2ecf20Sopenharmony_ci            ti,interrupt-ranges = <0 0 256>;
1098c2ecf20Sopenharmony_ci        };
1108c2ecf20Sopenharmony_ci    };
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