18c2ecf20Sopenharmony_ci* ARC-HS incore Interrupt Controller (Provided by cores implementing ARCv2 ISA)
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38c2ecf20Sopenharmony_ciProperties:
48c2ecf20Sopenharmony_ci
58c2ecf20Sopenharmony_ci- compatible: "snps,archs-intc"
68c2ecf20Sopenharmony_ci- interrupt-controller: This is an interrupt controller.
78c2ecf20Sopenharmony_ci- #interrupt-cells: Must be <1>.
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98c2ecf20Sopenharmony_ci  Single Cell "interrupts" property of a device specifies the IRQ number
108c2ecf20Sopenharmony_ci  between 16 to 256
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128c2ecf20Sopenharmony_ci  intc accessed via the special ARC AUX register interface, hence "reg" property
138c2ecf20Sopenharmony_ci  is not specified.
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158c2ecf20Sopenharmony_ciExample:
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178c2ecf20Sopenharmony_ci	intc: interrupt-controller {
188c2ecf20Sopenharmony_ci		compatible = "snps,archs-intc";
198c2ecf20Sopenharmony_ci		interrupt-controller;
208c2ecf20Sopenharmony_ci		#interrupt-cells = <1>;
218c2ecf20Sopenharmony_ci		interrupts = <16 17 18 19 20 21 22 23 24 25>;
228c2ecf20Sopenharmony_ci	};
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