18c2ecf20Sopenharmony_ci* NXP LPC32xx MIC, SIC1 and SIC2 Interrupt Controllers
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciRequired properties:
48c2ecf20Sopenharmony_ci- compatible: "nxp,lpc3220-mic" or "nxp,lpc3220-sic".
58c2ecf20Sopenharmony_ci- reg: should contain IC registers location and length.
68c2ecf20Sopenharmony_ci- interrupt-controller: identifies the node as an interrupt controller.
78c2ecf20Sopenharmony_ci- #interrupt-cells: the number of cells to define an interrupt, should be 2.
88c2ecf20Sopenharmony_ci  The first cell is the IRQ number, the second cell is used to specify
98c2ecf20Sopenharmony_ci  one of the supported IRQ types:
108c2ecf20Sopenharmony_ci      IRQ_TYPE_EDGE_RISING = low-to-high edge triggered,
118c2ecf20Sopenharmony_ci      IRQ_TYPE_EDGE_FALLING = high-to-low edge triggered,
128c2ecf20Sopenharmony_ci      IRQ_TYPE_LEVEL_HIGH = active high level-sensitive,
138c2ecf20Sopenharmony_ci      IRQ_TYPE_LEVEL_LOW = active low level-sensitive.
148c2ecf20Sopenharmony_ci  Reset value is IRQ_TYPE_LEVEL_LOW.
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ciOptional properties:
178c2ecf20Sopenharmony_ci- interrupts: empty for MIC interrupt controller, cascaded MIC
188c2ecf20Sopenharmony_ci  hardware interrupts for SIC1 and SIC2
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ciExamples:
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_ci	/* LPC32xx MIC, SIC1 and SIC2 interrupt controllers */
238c2ecf20Sopenharmony_ci	mic: interrupt-controller@40008000 {
248c2ecf20Sopenharmony_ci		compatible = "nxp,lpc3220-mic";
258c2ecf20Sopenharmony_ci		reg = <0x40008000 0x4000>;
268c2ecf20Sopenharmony_ci		interrupt-controller;
278c2ecf20Sopenharmony_ci		#interrupt-cells = <2>;
288c2ecf20Sopenharmony_ci	};
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_ci	sic1: interrupt-controller@4000c000 {
318c2ecf20Sopenharmony_ci		compatible = "nxp,lpc3220-sic";
328c2ecf20Sopenharmony_ci		reg = <0x4000c000 0x4000>;
338c2ecf20Sopenharmony_ci		interrupt-controller;
348c2ecf20Sopenharmony_ci		#interrupt-cells = <2>;
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_ci		interrupt-parent = <&mic>;
378c2ecf20Sopenharmony_ci		interrupts = <0 IRQ_TYPE_LEVEL_LOW>,
388c2ecf20Sopenharmony_ci			     <30 IRQ_TYPE_LEVEL_LOW>;
398c2ecf20Sopenharmony_ci	};
408c2ecf20Sopenharmony_ci
418c2ecf20Sopenharmony_ci	sic2: interrupt-controller@40010000 {
428c2ecf20Sopenharmony_ci		compatible = "nxp,lpc3220-sic";
438c2ecf20Sopenharmony_ci		reg = <0x40010000 0x4000>;
448c2ecf20Sopenharmony_ci		interrupt-controller;
458c2ecf20Sopenharmony_ci		#interrupt-cells = <2>;
468c2ecf20Sopenharmony_ci
478c2ecf20Sopenharmony_ci		interrupt-parent = <&mic>;
488c2ecf20Sopenharmony_ci		interrupts = <1 IRQ_TYPE_LEVEL_LOW>,
498c2ecf20Sopenharmony_ci			     <31 IRQ_TYPE_LEVEL_LOW>;
508c2ecf20Sopenharmony_ci	};
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_ci	/* ADC */
538c2ecf20Sopenharmony_ci	adc@40048000 {
548c2ecf20Sopenharmony_ci		compatible = "nxp,lpc3220-adc";
558c2ecf20Sopenharmony_ci		reg = <0x40048000 0x1000>;
568c2ecf20Sopenharmony_ci		interrupt-parent = <&sic1>;
578c2ecf20Sopenharmony_ci		interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
588c2ecf20Sopenharmony_ci	};
59