18c2ecf20Sopenharmony_ciNVIDIA Legacy Interrupt Controller 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciAll Tegra SoCs contain a legacy interrupt controller that routes 48c2ecf20Sopenharmony_ciinterrupts to the GIC, and also serves as a wakeup source. It is also 58c2ecf20Sopenharmony_cireferred to as "ictlr", hence the name of the binding. 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ciThe HW block exposes a number of interrupt controllers, each 88c2ecf20Sopenharmony_ciimplementing a set of 32 interrupts. 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ciRequired properties: 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ci- compatible : should be: "nvidia,tegra<chip>-ictlr". The LIC on 138c2ecf20Sopenharmony_ci subsequent SoCs remained backwards-compatible with Tegra30, so on 148c2ecf20Sopenharmony_ci Tegra generations later than Tegra30 the compatible value should 158c2ecf20Sopenharmony_ci include "nvidia,tegra30-ictlr". 168c2ecf20Sopenharmony_ci- reg : Specifies base physical address and size of the registers. 178c2ecf20Sopenharmony_ci Each controller must be described separately (Tegra20 has 4 of them, 188c2ecf20Sopenharmony_ci whereas Tegra30 and later have 5). 198c2ecf20Sopenharmony_ci- interrupt-controller : Identifies the node as an interrupt controller. 208c2ecf20Sopenharmony_ci- #interrupt-cells : Specifies the number of cells needed to encode an 218c2ecf20Sopenharmony_ci interrupt source. The value must be 3. 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ciNotes: 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci- Because this HW ultimately routes interrupts to the GIC, the 268c2ecf20Sopenharmony_ci interrupt specifier must be that of the GIC. 278c2ecf20Sopenharmony_ci- Only SPIs can use the ictlr as an interrupt parent. SGIs and PPIs 288c2ecf20Sopenharmony_ci are explicitly forbidden. 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ciExample: 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_ci ictlr: interrupt-controller@60004000 { 338c2ecf20Sopenharmony_ci compatible = "nvidia,tegra20-ictlr", "nvidia,tegra-ictlr"; 348c2ecf20Sopenharmony_ci reg = <0x60004000 64>, 358c2ecf20Sopenharmony_ci <0x60004100 64>, 368c2ecf20Sopenharmony_ci <0x60004200 64>, 378c2ecf20Sopenharmony_ci <0x60004300 64>; 388c2ecf20Sopenharmony_ci interrupt-controller; 398c2ecf20Sopenharmony_ci #interrupt-cells = <3>; 408c2ecf20Sopenharmony_ci interrupt-parent = <&intc>; 418c2ecf20Sopenharmony_ci }; 42