18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 28c2ecf20Sopenharmony_ci%YAML 1.2 38c2ecf20Sopenharmony_ci--- 48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/interrupt-controller/mstar,mst-intc.yaml# 58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_cititle: MStar Interrupt Controller 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_cimaintainers: 108c2ecf20Sopenharmony_ci - Mark-PK Tsai <mark-pk.tsai@mediatek.com> 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_cidescription: |+ 138c2ecf20Sopenharmony_ci MStar, SigmaStar and Mediatek TV SoCs contain multiple legacy 148c2ecf20Sopenharmony_ci interrupt controllers that routes interrupts to the GIC. 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ci The HW block exposes a number of interrupt controllers, each 178c2ecf20Sopenharmony_ci can support up to 64 interrupts. 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ciproperties: 208c2ecf20Sopenharmony_ci compatible: 218c2ecf20Sopenharmony_ci const: mstar,mst-intc 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ci interrupt-controller: true 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci "#interrupt-cells": 268c2ecf20Sopenharmony_ci const: 3 278c2ecf20Sopenharmony_ci description: | 288c2ecf20Sopenharmony_ci Use the same format as specified by GIC in arm,gic.yaml. 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci reg: 318c2ecf20Sopenharmony_ci maxItems: 1 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci mstar,irqs-map-range: 348c2ecf20Sopenharmony_ci description: | 358c2ecf20Sopenharmony_ci The range <start, end> of parent interrupt controller's interrupt 368c2ecf20Sopenharmony_ci lines that are hardwired to mstar interrupt controller. 378c2ecf20Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/uint32-matrix 388c2ecf20Sopenharmony_ci items: 398c2ecf20Sopenharmony_ci minItems: 2 408c2ecf20Sopenharmony_ci maxItems: 2 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_ci mstar,intc-no-eoi: 438c2ecf20Sopenharmony_ci description: 448c2ecf20Sopenharmony_ci Mark this controller has no End Of Interrupt(EOI) implementation. 458c2ecf20Sopenharmony_ci type: boolean 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_cirequired: 488c2ecf20Sopenharmony_ci - compatible 498c2ecf20Sopenharmony_ci - reg 508c2ecf20Sopenharmony_ci - mstar,irqs-map-range 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_ciadditionalProperties: false 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ciexamples: 558c2ecf20Sopenharmony_ci - | 568c2ecf20Sopenharmony_ci mst_intc0: interrupt-controller@1f2032d0 { 578c2ecf20Sopenharmony_ci compatible = "mstar,mst-intc"; 588c2ecf20Sopenharmony_ci interrupt-controller; 598c2ecf20Sopenharmony_ci #interrupt-cells = <3>; 608c2ecf20Sopenharmony_ci interrupt-parent = <&gic>; 618c2ecf20Sopenharmony_ci reg = <0x1f2032d0 0x30>; 628c2ecf20Sopenharmony_ci mstar,irqs-map-range = <0 63>; 638c2ecf20Sopenharmony_ci }; 648c2ecf20Sopenharmony_ci... 65