18c2ecf20Sopenharmony_ciThis document describes the generic device tree binding for MSI controllers and 28c2ecf20Sopenharmony_citheir master(s). 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ciMessage Signaled Interrupts (MSIs) are a class of interrupts generated by a 58c2ecf20Sopenharmony_ciwrite to an MMIO address. 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ciMSIs were originally specified by PCI (and are used with PCIe), but may also be 88c2ecf20Sopenharmony_ciused with other busses, and hence a mechanism is required to relate devices on 98c2ecf20Sopenharmony_cithose busses to the MSI controllers which they are capable of using, 108c2ecf20Sopenharmony_cipotentially including additional information. 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ciMSIs are distinguished by some combination of: 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ci- The doorbell (the MMIO address written to). 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ci Devices may be configured by software to write to arbitrary doorbells which 178c2ecf20Sopenharmony_ci they can address. An MSI controller may feature a number of doorbells. 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci- The payload (the value written to the doorbell). 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ci Devices may be configured to write an arbitrary payload chosen by software. 228c2ecf20Sopenharmony_ci MSI controllers may have restrictions on permitted payloads. 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci- Sideband information accompanying the write. 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci Typically this is neither configurable nor probeable, and depends on the path 278c2ecf20Sopenharmony_ci taken through the memory system (i.e. it is a property of the combination of 288c2ecf20Sopenharmony_ci MSI controller and device rather than a property of either in isolation). 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ciMSI controllers: 328c2ecf20Sopenharmony_ci================ 338c2ecf20Sopenharmony_ci 348c2ecf20Sopenharmony_ciAn MSI controller signals interrupts to a CPU when a write is made to an MMIO 358c2ecf20Sopenharmony_ciaddress by some master. An MSI controller may feature a number of doorbells. 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ciRequired properties: 388c2ecf20Sopenharmony_ci-------------------- 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_ci- msi-controller: Identifies the node as an MSI controller. 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_ciOptional properties: 438c2ecf20Sopenharmony_ci-------------------- 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ci- #msi-cells: The number of cells in an msi-specifier, required if not zero. 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ci Typically this will encode information related to sideband data, and will 488c2ecf20Sopenharmony_ci not encode doorbells or payloads as these can be configured dynamically. 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_ci The meaning of the msi-specifier is defined by the device tree binding of 518c2ecf20Sopenharmony_ci the specific MSI controller. 528c2ecf20Sopenharmony_ci 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ciMSI clients 558c2ecf20Sopenharmony_ci=========== 568c2ecf20Sopenharmony_ci 578c2ecf20Sopenharmony_ciMSI clients are devices which generate MSIs. For each MSI they wish to 588c2ecf20Sopenharmony_cigenerate, the doorbell and payload may be configured, though sideband 598c2ecf20Sopenharmony_ciinformation may not be configurable. 608c2ecf20Sopenharmony_ci 618c2ecf20Sopenharmony_ciRequired properties: 628c2ecf20Sopenharmony_ci-------------------- 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_ci- msi-parent: A list of phandle + msi-specifier pairs, one for each MSI 658c2ecf20Sopenharmony_ci controller which the device is capable of using. 668c2ecf20Sopenharmony_ci 678c2ecf20Sopenharmony_ci This property is unordered, and MSIs may be allocated from any combination of 688c2ecf20Sopenharmony_ci MSI controllers listed in the msi-parent property. 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_ci If a device has restrictions on the allocation of MSIs, these restrictions 718c2ecf20Sopenharmony_ci must be described with additional properties. 728c2ecf20Sopenharmony_ci 738c2ecf20Sopenharmony_ci When #msi-cells is non-zero, busses with an msi-parent will require 748c2ecf20Sopenharmony_ci additional properties to describe the relationship between devices on the bus 758c2ecf20Sopenharmony_ci and the set of MSIs they can potentially generate. 768c2ecf20Sopenharmony_ci 778c2ecf20Sopenharmony_ci 788c2ecf20Sopenharmony_ciExample 798c2ecf20Sopenharmony_ci======= 808c2ecf20Sopenharmony_ci 818c2ecf20Sopenharmony_ci/ { 828c2ecf20Sopenharmony_ci #address-cells = <1>; 838c2ecf20Sopenharmony_ci #size-cells = <1>; 848c2ecf20Sopenharmony_ci 858c2ecf20Sopenharmony_ci msi_a: msi-controller@a { 868c2ecf20Sopenharmony_ci reg = <0xa 0xf00>; 878c2ecf20Sopenharmony_ci compatible = "vendor-a,some-controller"; 888c2ecf20Sopenharmony_ci msi-controller; 898c2ecf20Sopenharmony_ci /* No sideband data, so #msi-cells omitted */ 908c2ecf20Sopenharmony_ci }; 918c2ecf20Sopenharmony_ci 928c2ecf20Sopenharmony_ci msi_b: msi-controller@b { 938c2ecf20Sopenharmony_ci reg = <0xb 0xf00>; 948c2ecf20Sopenharmony_ci compatible = "vendor-b,another-controller"; 958c2ecf20Sopenharmony_ci msi-controller; 968c2ecf20Sopenharmony_ci /* Each device has some unique ID */ 978c2ecf20Sopenharmony_ci #msi-cells = <1>; 988c2ecf20Sopenharmony_ci }; 998c2ecf20Sopenharmony_ci 1008c2ecf20Sopenharmony_ci msi_c: msi-controller@c { 1018c2ecf20Sopenharmony_ci reg = <0xc 0xf00>; 1028c2ecf20Sopenharmony_ci compatible = "vendor-b,another-controller"; 1038c2ecf20Sopenharmony_ci msi-controller; 1048c2ecf20Sopenharmony_ci /* Each device has some unique ID */ 1058c2ecf20Sopenharmony_ci #msi-cells = <1>; 1068c2ecf20Sopenharmony_ci }; 1078c2ecf20Sopenharmony_ci 1088c2ecf20Sopenharmony_ci dev@0 { 1098c2ecf20Sopenharmony_ci reg = <0x0 0xf00>; 1108c2ecf20Sopenharmony_ci compatible = "vendor-c,some-device"; 1118c2ecf20Sopenharmony_ci 1128c2ecf20Sopenharmony_ci /* Can only generate MSIs to msi_a */ 1138c2ecf20Sopenharmony_ci msi-parent = <&msi_a>; 1148c2ecf20Sopenharmony_ci }; 1158c2ecf20Sopenharmony_ci 1168c2ecf20Sopenharmony_ci dev@1 { 1178c2ecf20Sopenharmony_ci reg = <0x1 0xf00>; 1188c2ecf20Sopenharmony_ci compatible = "vendor-c,some-device"; 1198c2ecf20Sopenharmony_ci 1208c2ecf20Sopenharmony_ci /* 1218c2ecf20Sopenharmony_ci * Can generate MSIs to either A or B. 1228c2ecf20Sopenharmony_ci */ 1238c2ecf20Sopenharmony_ci msi-parent = <&msi_a>, <&msi_b 0x17>; 1248c2ecf20Sopenharmony_ci }; 1258c2ecf20Sopenharmony_ci 1268c2ecf20Sopenharmony_ci dev@2 { 1278c2ecf20Sopenharmony_ci reg = <0x2 0xf00>; 1288c2ecf20Sopenharmony_ci compatible = "vendor-c,some-device"; 1298c2ecf20Sopenharmony_ci /* 1308c2ecf20Sopenharmony_ci * Has different IDs at each MSI controller. 1318c2ecf20Sopenharmony_ci * Can generate MSIs to all of the MSI controllers. 1328c2ecf20Sopenharmony_ci */ 1338c2ecf20Sopenharmony_ci msi-parent = <&msi_a>, <&msi_b 0x17>, <&msi_c 0x53>; 1348c2ecf20Sopenharmony_ci }; 1358c2ecf20Sopenharmony_ci}; 136