18c2ecf20Sopenharmony_ciMicrochip PIC32 Interrupt Controller
28c2ecf20Sopenharmony_ci====================================
38c2ecf20Sopenharmony_ci
48c2ecf20Sopenharmony_ciThe Microchip PIC32 contains an Enhanced Vectored Interrupt Controller (EVIC).
58c2ecf20Sopenharmony_ciIt handles all internal and external interrupts. This controller exists outside
68c2ecf20Sopenharmony_ciof the CPU and is the arbitrator of all interrupts (including interrupts from
78c2ecf20Sopenharmony_cithe CPU itself) before they are presented to the CPU.
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_ciExternal interrupts have a software configurable edge polarity. Non external
108c2ecf20Sopenharmony_ciinterrupts have a type and polarity that is determined by the source of the
118c2ecf20Sopenharmony_ciinterrupt.
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ciRequired properties
148c2ecf20Sopenharmony_ci-------------------
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ci- compatible: Should be "microchip,pic32mzda-evic"
178c2ecf20Sopenharmony_ci- reg: Specifies physical base address and size of register range.
188c2ecf20Sopenharmony_ci- interrupt-controller: Identifies the node as an interrupt controller.
198c2ecf20Sopenharmony_ci- #interrupt cells: Specifies the number of cells used to encode an interrupt
208c2ecf20Sopenharmony_ci  source connected to this controller. The value shall be 2 and interrupt
218c2ecf20Sopenharmony_ci  descriptor shall have the following format:
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ci	<hw_irq irq_type>
248c2ecf20Sopenharmony_ci
258c2ecf20Sopenharmony_ci  hw_irq - represents the hardware interrupt number as in the data sheet.
268c2ecf20Sopenharmony_ci  irq_type - is used to describe the type and polarity of an interrupt. For
278c2ecf20Sopenharmony_ci  internal interrupts use IRQ_TYPE_EDGE_RISING for non persistent interrupts and
288c2ecf20Sopenharmony_ci  IRQ_TYPE_LEVEL_HIGH for persistent interrupts. For external interrupts use
298c2ecf20Sopenharmony_ci  IRQ_TYPE_EDGE_RISING or IRQ_TYPE_EDGE_FALLING to select the desired polarity.
308c2ecf20Sopenharmony_ci
318c2ecf20Sopenharmony_ciOptional properties
328c2ecf20Sopenharmony_ci-------------------
338c2ecf20Sopenharmony_ci- microchip,external-irqs: u32 array of external interrupts with software
348c2ecf20Sopenharmony_ci  polarity configuration. This array corresponds to the bits in the INTCON
358c2ecf20Sopenharmony_ci  SFR.
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_ciExample
388c2ecf20Sopenharmony_ci-------
398c2ecf20Sopenharmony_ci
408c2ecf20Sopenharmony_cievic: interrupt-controller@1f810000 {
418c2ecf20Sopenharmony_ci	compatible = "microchip,pic32mzda-evic";
428c2ecf20Sopenharmony_ci	interrupt-controller;
438c2ecf20Sopenharmony_ci	#interrupt-cells = <2>;
448c2ecf20Sopenharmony_ci	reg = <0x1f810000 0x1000>;
458c2ecf20Sopenharmony_ci	microchip,external-irqs = <3 8 13 18 23>;
468c2ecf20Sopenharmony_ci};
478c2ecf20Sopenharmony_ci
488c2ecf20Sopenharmony_ciEach device/peripheral must request its interrupt line with the associated type
498c2ecf20Sopenharmony_ciand polarity.
508c2ecf20Sopenharmony_ci
518c2ecf20Sopenharmony_ciInternal interrupt DTS snippet
528c2ecf20Sopenharmony_ci------------------------------
538c2ecf20Sopenharmony_ci
548c2ecf20Sopenharmony_cidevice@1f800000 {
558c2ecf20Sopenharmony_ci	...
568c2ecf20Sopenharmony_ci	interrupts = <113 IRQ_TYPE_LEVEL_HIGH>;
578c2ecf20Sopenharmony_ci	...
588c2ecf20Sopenharmony_ci};
598c2ecf20Sopenharmony_ci
608c2ecf20Sopenharmony_ciExternal interrupt DTS snippet
618c2ecf20Sopenharmony_ci------------------------------
628c2ecf20Sopenharmony_ci
638c2ecf20Sopenharmony_cidevice@1f800000 {
648c2ecf20Sopenharmony_ci	...
658c2ecf20Sopenharmony_ci	interrupts = <3 IRQ_TYPE_EDGE_RISING>;
668c2ecf20Sopenharmony_ci	...
678c2ecf20Sopenharmony_ci};
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