18c2ecf20Sopenharmony_ciBroadcom Generic Level 2 Interrupt Controller 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciRequired properties: 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ci- compatible: should be one of: 68c2ecf20Sopenharmony_ci "brcm,hif-spi-l2-intc" or 78c2ecf20Sopenharmony_ci "brcm,upg-aux-aon-l2-intc" or 88c2ecf20Sopenharmony_ci "brcm,l2-intc" for latched interrupt controllers 98c2ecf20Sopenharmony_ci should be "brcm,bcm7271-l2-intc" for level interrupt controllers 108c2ecf20Sopenharmony_ci- reg: specifies the base physical address and size of the registers 118c2ecf20Sopenharmony_ci- interrupt-controller: identifies the node as an interrupt controller 128c2ecf20Sopenharmony_ci- #interrupt-cells: specifies the number of cells needed to encode an 138c2ecf20Sopenharmony_ci interrupt source. Should be 1. 148c2ecf20Sopenharmony_ci- interrupts: specifies the interrupt line in the interrupt-parent irq space 158c2ecf20Sopenharmony_ci to be used for cascading 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ciOptional properties: 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci- brcm,irq-can-wake: If present, this means the L2 controller can be used as a 208c2ecf20Sopenharmony_ci wakeup source for system suspend/resume. 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ciExample: 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_cihif_intr2_intc: interrupt-controller@f0441000 { 258c2ecf20Sopenharmony_ci compatible = "brcm,l2-intc"; 268c2ecf20Sopenharmony_ci reg = <0xf0441000 0x30>; 278c2ecf20Sopenharmony_ci interrupt-controller; 288c2ecf20Sopenharmony_ci #interrupt-cells = <1>; 298c2ecf20Sopenharmony_ci interrupt-parent = <&intc>; 308c2ecf20Sopenharmony_ci interrupts = <0x0 0x20 0x0>; 318c2ecf20Sopenharmony_ci}; 32