18c2ecf20Sopenharmony_ciBroadcom BCM3380-style Level 1 / Level 2 interrupt controller
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciThis interrupt controller shows up in various forms on many BCM338x/BCM63xx
48c2ecf20Sopenharmony_cichipsets.  It has the following properties:
58c2ecf20Sopenharmony_ci
68c2ecf20Sopenharmony_ci- outputs a single interrupt signal to its interrupt controller parent
78c2ecf20Sopenharmony_ci
88c2ecf20Sopenharmony_ci- contains one or more enable/status word pairs, which often appear at
98c2ecf20Sopenharmony_ci  different offsets in different blocks
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci- no atomic set/clear operations
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ciRequired properties:
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_ci- compatible: should be "brcm,bcm3380-l2-intc"
168c2ecf20Sopenharmony_ci- reg: specifies one or more enable/status pairs, in the following format:
178c2ecf20Sopenharmony_ci  <enable_reg 0x4 status_reg 0x4>...
188c2ecf20Sopenharmony_ci- interrupt-controller: identifies the node as an interrupt controller
198c2ecf20Sopenharmony_ci- #interrupt-cells: specifies the number of cells needed to encode an interrupt
208c2ecf20Sopenharmony_ci  source, should be 1.
218c2ecf20Sopenharmony_ci- interrupts: specifies the interrupt line in the interrupt-parent controller
228c2ecf20Sopenharmony_ci  node, valid values depend on the type of parent interrupt controller
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_ciOptional properties:
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ci- brcm,irq-can-wake: if present, this means the L2 controller can be used as a
278c2ecf20Sopenharmony_ci  wakeup source for system suspend/resume.
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_ciExample:
308c2ecf20Sopenharmony_ci
318c2ecf20Sopenharmony_ciirq0_intc: interrupt-controller@10000020 {
328c2ecf20Sopenharmony_ci	compatible = "brcm,bcm3380-l2-intc";
338c2ecf20Sopenharmony_ci	reg = <0x10000024 0x4 0x1000002c 0x4>,
348c2ecf20Sopenharmony_ci	      <0x10000020 0x4 0x10000028 0x4>;
358c2ecf20Sopenharmony_ci	interrupt-controller;
368c2ecf20Sopenharmony_ci	#interrupt-cells = <1>;
378c2ecf20Sopenharmony_ci	interrupt-parent = <&cpu_intc>;
388c2ecf20Sopenharmony_ci	interrupts = <2>;
398c2ecf20Sopenharmony_ci};
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