18c2ecf20Sopenharmony_ciBCM2836 per-CPU interrupt controller 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciThe BCM2836 has a per-cpu interrupt controller for the timer, PMU 48c2ecf20Sopenharmony_cievents, and SMP IPIs. One of the CPUs may receive interrupts for the 58c2ecf20Sopenharmony_ciperipheral (GPU) events, which chain to the BCM2835-style interrupt 68c2ecf20Sopenharmony_cicontroller. 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ciRequired properties: 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci- compatible: Should be "brcm,bcm2836-l1-intc" 118c2ecf20Sopenharmony_ci- reg: Specifies base physical address and size of the 128c2ecf20Sopenharmony_ci registers 138c2ecf20Sopenharmony_ci- interrupt-controller: Identifies the node as an interrupt controller 148c2ecf20Sopenharmony_ci- #interrupt-cells: Specifies the number of cells needed to encode an 158c2ecf20Sopenharmony_ci interrupt source. The value shall be 2 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ciPlease refer to interrupts.txt in this directory for details of the common 188c2ecf20Sopenharmony_ciInterrupt Controllers bindings used by client devices. 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ciThe interrupt sources are as follows: 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ci0: CNTPSIRQ 238c2ecf20Sopenharmony_ci1: CNTPNSIRQ 248c2ecf20Sopenharmony_ci2: CNTHPIRQ 258c2ecf20Sopenharmony_ci3: CNTVIRQ 268c2ecf20Sopenharmony_ci8: GPU_FAST 278c2ecf20Sopenharmony_ci9: PMU_FAST 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ciExample: 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_cilocal_intc: local_intc { 328c2ecf20Sopenharmony_ci compatible = "brcm,bcm2836-l1-intc"; 338c2ecf20Sopenharmony_ci reg = <0x40000000 0x100>; 348c2ecf20Sopenharmony_ci interrupt-controller; 358c2ecf20Sopenharmony_ci #interrupt-cells = <2>; 368c2ecf20Sopenharmony_ci interrupt-parent = <&local_intc>; 378c2ecf20Sopenharmony_ci}; 38