18c2ecf20Sopenharmony_ci* NXP LPC32xx SoC Touchscreen Controller (TSC)
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciRequired properties:
48c2ecf20Sopenharmony_ci- compatible: must be "nxp,lpc3220-tsc"
58c2ecf20Sopenharmony_ci- reg: physical base address of the controller and length of memory mapped
68c2ecf20Sopenharmony_ci  region.
78c2ecf20Sopenharmony_ci- interrupts: The TSC/ADC interrupt
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_ciExample:
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci	tsc@40048000 {
128c2ecf20Sopenharmony_ci		compatible = "nxp,lpc3220-tsc";
138c2ecf20Sopenharmony_ci		reg = <0x40048000 0x1000>;
148c2ecf20Sopenharmony_ci		interrupt-parent = <&mic>;
158c2ecf20Sopenharmony_ci		interrupts = <39 0>;
168c2ecf20Sopenharmony_ci	};
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