18c2ecf20Sopenharmony_ciDevice tree configuration for Renesas EMEV2 IIC controller 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciRequired properties: 48c2ecf20Sopenharmony_ci- compatible : "renesas,iic-emev2" 58c2ecf20Sopenharmony_ci- reg : address start and address range size of device 68c2ecf20Sopenharmony_ci- interrupts : specifier for the IIC controller interrupt 78c2ecf20Sopenharmony_ci- clocks : phandle to the IP core SCLK 88c2ecf20Sopenharmony_ci- clock-names : must be "sclk" 98c2ecf20Sopenharmony_ci- #address-cells : should be <1> 108c2ecf20Sopenharmony_ci- #size-cells : should be <0> 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ciExample: 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ci iic0: i2c@e0070000 { 158c2ecf20Sopenharmony_ci #address-cells = <1>; 168c2ecf20Sopenharmony_ci #size-cells = <0>; 178c2ecf20Sopenharmony_ci compatible = "renesas,iic-emev2"; 188c2ecf20Sopenharmony_ci reg = <0xe0070000 0x28>; 198c2ecf20Sopenharmony_ci interrupts = <0 32 IRQ_TYPE_EDGE_RISING>; 208c2ecf20Sopenharmony_ci clocks = <&iic0_sclk>; 218c2ecf20Sopenharmony_ci clock-names = "sclk"; 228c2ecf20Sopenharmony_ci }; 23