18c2ecf20Sopenharmony_ciOMAP SSI controller bindings 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciOMAP3's Synchronous Serial Interface (SSI) controller implements a 48c2ecf20Sopenharmony_cilegacy variant of MIPI's High Speed Synchronous Serial Interface (HSI), 58c2ecf20Sopenharmony_ciwhile the controller found inside OMAP4 is supposed to be fully compliant 68c2ecf20Sopenharmony_ciwith the HSI standard. 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ciRequired properties: 98c2ecf20Sopenharmony_ci- compatible: Should include "ti,omap3-ssi" or "ti,omap4-hsi" 108c2ecf20Sopenharmony_ci- reg-names: Contains the values "sys" and "gdd" (in this order). 118c2ecf20Sopenharmony_ci- reg: Contains a matching register specifier for each entry 128c2ecf20Sopenharmony_ci in reg-names. 138c2ecf20Sopenharmony_ci- interrupt-names: Contains the value "gdd_mpu". 148c2ecf20Sopenharmony_ci- interrupts: Contains matching interrupt information for each entry 158c2ecf20Sopenharmony_ci in interrupt-names. 168c2ecf20Sopenharmony_ci- ranges: Represents the bus address mapping between the main 178c2ecf20Sopenharmony_ci controller node and the child nodes below. 188c2ecf20Sopenharmony_ci- clock-names: Must include the following entries: 198c2ecf20Sopenharmony_ci "ssi_ssr_fck": The OMAP clock of that name 208c2ecf20Sopenharmony_ci "ssi_sst_fck": The OMAP clock of that name 218c2ecf20Sopenharmony_ci "ssi_ick": The OMAP clock of that name 228c2ecf20Sopenharmony_ci- clocks: Contains a matching clock specifier for each entry in 238c2ecf20Sopenharmony_ci clock-names. 248c2ecf20Sopenharmony_ci- #address-cells: Should be set to <1> 258c2ecf20Sopenharmony_ci- #size-cells: Should be set to <1> 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ciEach port is represented as a sub-node of the ti,omap3-ssi device. 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ciRequired Port sub-node properties: 308c2ecf20Sopenharmony_ci- compatible: Should be set to the following value 318c2ecf20Sopenharmony_ci ti,omap3-ssi-port (applicable to OMAP34xx devices) 328c2ecf20Sopenharmony_ci ti,omap4-hsi-port (applicable to OMAP44xx devices) 338c2ecf20Sopenharmony_ci- reg-names: Contains the values "tx" and "rx" (in this order). 348c2ecf20Sopenharmony_ci- reg: Contains a matching register specifier for each entry 358c2ecf20Sopenharmony_ci in reg-names. 368c2ecf20Sopenharmony_ci- interrupts: Should contain interrupt specifiers for mpu interrupts 378c2ecf20Sopenharmony_ci 0 and 1 (in this order). 388c2ecf20Sopenharmony_ci- ti,ssi-cawake-gpio: Defines which GPIO pin is used to signify CAWAKE 398c2ecf20Sopenharmony_ci events for the port. This is an optional board-specific 408c2ecf20Sopenharmony_ci property. If it's missing the port will not be 418c2ecf20Sopenharmony_ci enabled. 428c2ecf20Sopenharmony_ci 438c2ecf20Sopenharmony_ciOptional properties: 448c2ecf20Sopenharmony_ci- ti,hwmods: Shall contain TI interconnect module name if needed 458c2ecf20Sopenharmony_ci by the SoC 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ciExample for Nokia N900: 488c2ecf20Sopenharmony_ci 498c2ecf20Sopenharmony_cissi-controller@48058000 { 508c2ecf20Sopenharmony_ci compatible = "ti,omap3-ssi"; 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_ci /* needed until hwmod is updated to use the compatible string */ 538c2ecf20Sopenharmony_ci ti,hwmods = "ssi"; 548c2ecf20Sopenharmony_ci 558c2ecf20Sopenharmony_ci reg = <0x48058000 0x1000>, 568c2ecf20Sopenharmony_ci <0x48059000 0x1000>; 578c2ecf20Sopenharmony_ci reg-names = "sys", 588c2ecf20Sopenharmony_ci "gdd"; 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_ci interrupts = <55>; 618c2ecf20Sopenharmony_ci interrupt-names = "gdd_mpu"; 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ci clocks = <&ssi_ssr_fck>, 648c2ecf20Sopenharmony_ci <&ssi_sst_fck>, 658c2ecf20Sopenharmony_ci <&ssi_ick>; 668c2ecf20Sopenharmony_ci clock-names = "ssi_ssr_fck", 678c2ecf20Sopenharmony_ci "ssi_sst_fck", 688c2ecf20Sopenharmony_ci "ssi_ick"; 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_ci #address-cells = <1>; 718c2ecf20Sopenharmony_ci #size-cells = <1>; 728c2ecf20Sopenharmony_ci ranges; 738c2ecf20Sopenharmony_ci 748c2ecf20Sopenharmony_ci ssi-port@4805a000 { 758c2ecf20Sopenharmony_ci compatible = "ti,omap3-ssi-port"; 768c2ecf20Sopenharmony_ci 778c2ecf20Sopenharmony_ci reg = <0x4805a000 0x800>, 788c2ecf20Sopenharmony_ci <0x4805a800 0x800>; 798c2ecf20Sopenharmony_ci reg-names = "tx", 808c2ecf20Sopenharmony_ci "rx"; 818c2ecf20Sopenharmony_ci 828c2ecf20Sopenharmony_ci interrupt-parent = <&intc>; 838c2ecf20Sopenharmony_ci interrupts = <67>, 848c2ecf20Sopenharmony_ci <68>; 858c2ecf20Sopenharmony_ci 868c2ecf20Sopenharmony_ci ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */ 878c2ecf20Sopenharmony_ci } 888c2ecf20Sopenharmony_ci 898c2ecf20Sopenharmony_ci ssi-port@4805a000 { 908c2ecf20Sopenharmony_ci compatible = "ti,omap3-ssi-port"; 918c2ecf20Sopenharmony_ci 928c2ecf20Sopenharmony_ci reg = <0x4805b000 0x800>, 938c2ecf20Sopenharmony_ci <0x4805b800 0x800>; 948c2ecf20Sopenharmony_ci reg-names = "tx", 958c2ecf20Sopenharmony_ci "rx"; 968c2ecf20Sopenharmony_ci 978c2ecf20Sopenharmony_ci interrupt-parent = <&intc>; 988c2ecf20Sopenharmony_ci interrupts = <69>, 998c2ecf20Sopenharmony_ci <70>; 1008c2ecf20Sopenharmony_ci 1018c2ecf20Sopenharmony_ci } 1028c2ecf20Sopenharmony_ci} 103