18c2ecf20Sopenharmony_ciDevice-tree bindings for AST2600 FSI master 28c2ecf20Sopenharmony_ci------------------------------------------- 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ciThe AST2600 contains two identical FSI masters. They share a clock and have a 58c2ecf20Sopenharmony_ciseparate interrupt line and output pins. 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ciRequired properties: 88c2ecf20Sopenharmony_ci - compatible: "aspeed,ast2600-fsi-master" 98c2ecf20Sopenharmony_ci - reg: base address and length 108c2ecf20Sopenharmony_ci - clocks: phandle and clock number 118c2ecf20Sopenharmony_ci - interrupts: platform dependent interrupt description 128c2ecf20Sopenharmony_ci - pinctrl-0: phandle to pinctrl node 138c2ecf20Sopenharmony_ci - pinctrl-names: pinctrl state 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ciOptional properties: 168c2ecf20Sopenharmony_ci - cfam-reset-gpios: GPIO for CFAM reset 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci - fsi-routing-gpios: GPIO for setting the FSI mux (internal or cabled) 198c2ecf20Sopenharmony_ci - fsi-mux-gpios: GPIO for detecting the desired FSI mux state 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ciExamples: 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci fsi-master { 258c2ecf20Sopenharmony_ci compatible = "aspeed,ast2600-fsi-master", "fsi-master"; 268c2ecf20Sopenharmony_ci reg = <0x1e79b000 0x94>; 278c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 288c2ecf20Sopenharmony_ci pinctrl-names = "default"; 298c2ecf20Sopenharmony_ci pinctrl-0 = <&pinctrl_fsi1_default>; 308c2ecf20Sopenharmony_ci clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_ci fsi-routing-gpios = <&gpio0 ASPEED_GPIO(Q, 7) GPIO_ACTIVE_HIGH>; 338c2ecf20Sopenharmony_ci fsi-mux-gpios = <&gpio0 ASPEED_GPIO(B, 0) GPIO_ACTIVE_HIGH>; 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ci cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_LOW>; 368c2ecf20Sopenharmony_ci }; 37