18c2ecf20Sopenharmony_ciIntel Service Layer Driver for Stratix10 SoC
28c2ecf20Sopenharmony_ci============================================
38c2ecf20Sopenharmony_ciIntel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard
48c2ecf20Sopenharmony_ciprocessor system (HPS) and Secure Device Manager (SDM). When the FPGA is
58c2ecf20Sopenharmony_ciconfigured from HPS, there needs to be a way for HPS to notify SDM the
68c2ecf20Sopenharmony_cilocation and size of the configuration data. Then SDM will get the
78c2ecf20Sopenharmony_ciconfiguration data from that location and perform the FPGA configuration.
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_ciTo meet the whole system security needs and support virtual machine requesting
108c2ecf20Sopenharmony_cicommunication with SDM, only the secure world of software (EL3, Exception
118c2ecf20Sopenharmony_ciLayer 3) can interface with SDM. All software entities running on other
128c2ecf20Sopenharmony_ciexception layers must channel through the EL3 software whenever it needs
138c2ecf20Sopenharmony_ciservice from SDM.
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_ciIntel Stratix10 service layer driver, running at privileged exception level
168c2ecf20Sopenharmony_ci(EL1, Exception Layer 1), interfaces with the service providers and provides
178c2ecf20Sopenharmony_cithe services for FPGA configuration, QSPI, Crypto and warm reset. Service layer
188c2ecf20Sopenharmony_cidriver also manages secure monitor call (SMC) to communicate with secure monitor
198c2ecf20Sopenharmony_cicode running in EL3.
208c2ecf20Sopenharmony_ci
218c2ecf20Sopenharmony_ciRequired properties:
228c2ecf20Sopenharmony_ci-------------------
238c2ecf20Sopenharmony_ciThe svc node has the following mandatory properties, must be located under
248c2ecf20Sopenharmony_cithe firmware node.
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ci- compatible: "intel,stratix10-svc" or "intel,agilex-svc"
278c2ecf20Sopenharmony_ci- method: smc or hvc
288c2ecf20Sopenharmony_ci        smc - Secure Monitor Call
298c2ecf20Sopenharmony_ci        hvc - Hypervisor Call
308c2ecf20Sopenharmony_ci- memory-region:
318c2ecf20Sopenharmony_ci	phandle to the reserved memory node. See
328c2ecf20Sopenharmony_ci	Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
338c2ecf20Sopenharmony_ci	for details
348c2ecf20Sopenharmony_ci
358c2ecf20Sopenharmony_ciExample:
368c2ecf20Sopenharmony_ci-------
378c2ecf20Sopenharmony_ci
388c2ecf20Sopenharmony_ci	reserved-memory {
398c2ecf20Sopenharmony_ci                #address-cells = <2>;
408c2ecf20Sopenharmony_ci                #size-cells = <2>;
418c2ecf20Sopenharmony_ci                ranges;
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ci                service_reserved: svcbuffer@0 {
448c2ecf20Sopenharmony_ci                        compatible = "shared-dma-pool";
458c2ecf20Sopenharmony_ci                        reg = <0x0 0x0 0x0 0x1000000>;
468c2ecf20Sopenharmony_ci                        alignment = <0x1000>;
478c2ecf20Sopenharmony_ci                        no-map;
488c2ecf20Sopenharmony_ci                };
498c2ecf20Sopenharmony_ci        };
508c2ecf20Sopenharmony_ci
518c2ecf20Sopenharmony_ci	firmware {
528c2ecf20Sopenharmony_ci		svc {
538c2ecf20Sopenharmony_ci			compatible = "intel,stratix10-svc";
548c2ecf20Sopenharmony_ci			method = "smc";
558c2ecf20Sopenharmony_ci			memory-region = <&service_reserved>;
568c2ecf20Sopenharmony_ci		};
578c2ecf20Sopenharmony_ci	};
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