18c2ecf20Sopenharmony_ci* Milbeaut AHB DMA Controller
28c2ecf20Sopenharmony_ci
38c2ecf20Sopenharmony_ciMilbeaut AHB DMA controller has transfer capability below.
48c2ecf20Sopenharmony_ci - device to memory transfer
58c2ecf20Sopenharmony_ci - memory to device transfer
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_ciRequired property:
88c2ecf20Sopenharmony_ci- compatible:       Should be  "socionext,milbeaut-m10v-hdmac"
98c2ecf20Sopenharmony_ci- reg:              Should contain DMA registers location and length.
108c2ecf20Sopenharmony_ci- interrupts:       Should contain all of the per-channel DMA interrupts.
118c2ecf20Sopenharmony_ci                     Number of channels is configurable - 2, 4 or 8, so
128c2ecf20Sopenharmony_ci                     the number of interrupts specified should be {2,4,8}.
138c2ecf20Sopenharmony_ci- #dma-cells:       Should be 1. Specify the ID of the slave.
148c2ecf20Sopenharmony_ci- clocks:           Phandle to the clock used by the HDMAC module.
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ci
178c2ecf20Sopenharmony_ciExample:
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ci	hdmac1: dma-controller@1e110000 {
208c2ecf20Sopenharmony_ci		compatible = "socionext,milbeaut-m10v-hdmac";
218c2ecf20Sopenharmony_ci		reg = <0x1e110000 0x10000>;
228c2ecf20Sopenharmony_ci		interrupts = <0 132 4>,
238c2ecf20Sopenharmony_ci			     <0 133 4>,
248c2ecf20Sopenharmony_ci			     <0 134 4>,
258c2ecf20Sopenharmony_ci			     <0 135 4>,
268c2ecf20Sopenharmony_ci			     <0 136 4>,
278c2ecf20Sopenharmony_ci			     <0 137 4>,
288c2ecf20Sopenharmony_ci			     <0 138 4>,
298c2ecf20Sopenharmony_ci			     <0 139 4>;
308c2ecf20Sopenharmony_ci		#dma-cells = <1>;
318c2ecf20Sopenharmony_ci		clocks = <&dummy_clk>;
328c2ecf20Sopenharmony_ci	};
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