18c2ecf20Sopenharmony_ciAnalog Devices AXI-DMAC DMA controller 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciRequired properties: 48c2ecf20Sopenharmony_ci - compatible: Must be "adi,axi-dmac-1.00.a". 58c2ecf20Sopenharmony_ci - reg: Specification for the controllers memory mapped register map. 68c2ecf20Sopenharmony_ci - interrupts: Specification for the controllers interrupt. 78c2ecf20Sopenharmony_ci - clocks: Phandle and specifier to the controllers AXI interface clock 88c2ecf20Sopenharmony_ci - #dma-cells: Must be 1. 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ciRequired sub-nodes: 118c2ecf20Sopenharmony_ci - adi,channels: This sub-node must contain a sub-node for each DMA channel. For 128c2ecf20Sopenharmony_ci the channel sub-nodes the following bindings apply. They must match the 138c2ecf20Sopenharmony_ci configuration options of the peripheral as it was instantiated. 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ciRequired properties for adi,channels sub-node: 168c2ecf20Sopenharmony_ci - #size-cells: Must be 0 178c2ecf20Sopenharmony_ci - #address-cells: Must be 1 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ciRequired channel sub-node properties: 208c2ecf20Sopenharmony_ci - reg: Which channel this node refers to. 218c2ecf20Sopenharmony_ci - adi,source-bus-width, 228c2ecf20Sopenharmony_ci adi,destination-bus-width: Width of the source or destination bus in bits. 238c2ecf20Sopenharmony_ci - adi,source-bus-type, 248c2ecf20Sopenharmony_ci adi,destination-bus-type: Type of the source or destination bus. Must be one 258c2ecf20Sopenharmony_ci of the following: 268c2ecf20Sopenharmony_ci 0 (AXI_DMAC_TYPE_AXI_MM): Memory mapped AXI interface 278c2ecf20Sopenharmony_ci 1 (AXI_DMAC_TYPE_AXI_STREAM): Streaming AXI interface 288c2ecf20Sopenharmony_ci 2 (AXI_DMAC_TYPE_AXI_FIFO): FIFO interface 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ciDeprecated optional channel properties: 318c2ecf20Sopenharmony_ci - adi,length-width: Width of the DMA transfer length register. 328c2ecf20Sopenharmony_ci - adi,cyclic: Must be set if the channel supports hardware cyclic DMA 338c2ecf20Sopenharmony_ci transfers. 348c2ecf20Sopenharmony_ci - adi,2d: Must be set if the channel supports hardware 2D DMA transfers. 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_ciDMA clients connected to the AXI-DMAC DMA controller must use the format 378c2ecf20Sopenharmony_cidescribed in the dma.txt file using a one-cell specifier. The value of the 388c2ecf20Sopenharmony_cispecifier refers to the DMA channel index. 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_ciExample: 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_cidma: dma@7c420000 { 438c2ecf20Sopenharmony_ci compatible = "adi,axi-dmac-1.00.a"; 448c2ecf20Sopenharmony_ci reg = <0x7c420000 0x10000>; 458c2ecf20Sopenharmony_ci interrupts = <0 57 0>; 468c2ecf20Sopenharmony_ci clocks = <&clkc 16>; 478c2ecf20Sopenharmony_ci #dma-cells = <1>; 488c2ecf20Sopenharmony_ci 498c2ecf20Sopenharmony_ci adi,channels { 508c2ecf20Sopenharmony_ci #size-cells = <0>; 518c2ecf20Sopenharmony_ci #address-cells = <1>; 528c2ecf20Sopenharmony_ci 538c2ecf20Sopenharmony_ci dma-channel@0 { 548c2ecf20Sopenharmony_ci reg = <0>; 558c2ecf20Sopenharmony_ci adi,source-bus-width = <32>; 568c2ecf20Sopenharmony_ci adi,source-bus-type = <ADI_AXI_DMAC_TYPE_MM_AXI>; 578c2ecf20Sopenharmony_ci adi,destination-bus-width = <64>; 588c2ecf20Sopenharmony_ci adi,destination-bus-type = <ADI_AXI_DMAC_TYPE_FIFO>; 598c2ecf20Sopenharmony_ci }; 608c2ecf20Sopenharmony_ci }; 618c2ecf20Sopenharmony_ci}; 62