18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 28c2ecf20Sopenharmony_ci%YAML 1.2 38c2ecf20Sopenharmony_ci--- 48c2ecf20Sopenharmony_ci$id: http://devicetree.org/schemas/display/st,stm32-dsi.yaml# 58c2ecf20Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_cititle: STMicroelectronics STM32 DSI host controller 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_cimaintainers: 108c2ecf20Sopenharmony_ci - Philippe Cornu <philippe.cornu@st.com> 118c2ecf20Sopenharmony_ci - Yannick Fertre <yannick.fertre@st.com> 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_cidescription: 148c2ecf20Sopenharmony_ci The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller. 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ciallOf: 178c2ecf20Sopenharmony_ci - $ref: dsi-controller.yaml# 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ciproperties: 208c2ecf20Sopenharmony_ci compatible: 218c2ecf20Sopenharmony_ci const: st,stm32-dsi 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ci reg: 248c2ecf20Sopenharmony_ci maxItems: 1 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci clocks: 278c2ecf20Sopenharmony_ci items: 288c2ecf20Sopenharmony_ci - description: Module Clock 298c2ecf20Sopenharmony_ci - description: DSI bus clock 308c2ecf20Sopenharmony_ci - description: Pixel clock 318c2ecf20Sopenharmony_ci minItems: 2 328c2ecf20Sopenharmony_ci maxItems: 3 338c2ecf20Sopenharmony_ci 348c2ecf20Sopenharmony_ci clock-names: 358c2ecf20Sopenharmony_ci items: 368c2ecf20Sopenharmony_ci - const: pclk 378c2ecf20Sopenharmony_ci - const: ref 388c2ecf20Sopenharmony_ci - const: px_clk 398c2ecf20Sopenharmony_ci minItems: 2 408c2ecf20Sopenharmony_ci maxItems: 3 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_ci resets: 438c2ecf20Sopenharmony_ci maxItems: 1 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ci reset-names: 468c2ecf20Sopenharmony_ci items: 478c2ecf20Sopenharmony_ci - const: apb 488c2ecf20Sopenharmony_ci 498c2ecf20Sopenharmony_ci phy-dsi-supply: 508c2ecf20Sopenharmony_ci description: 518c2ecf20Sopenharmony_ci Phandle of the regulator that provides the supply voltage. 528c2ecf20Sopenharmony_ci 538c2ecf20Sopenharmony_ci ports: 548c2ecf20Sopenharmony_ci type: object 558c2ecf20Sopenharmony_ci description: 568c2ecf20Sopenharmony_ci A node containing DSI input & output port nodes with endpoint 578c2ecf20Sopenharmony_ci definitions as documented in 588c2ecf20Sopenharmony_ci Documentation/devicetree/bindings/media/video-interfaces.txt 598c2ecf20Sopenharmony_ci Documentation/devicetree/bindings/graph.txt 608c2ecf20Sopenharmony_ci properties: 618c2ecf20Sopenharmony_ci port@0: 628c2ecf20Sopenharmony_ci type: object 638c2ecf20Sopenharmony_ci description: 648c2ecf20Sopenharmony_ci DSI input port node, connected to the ltdc rgb output port. 658c2ecf20Sopenharmony_ci 668c2ecf20Sopenharmony_ci port@1: 678c2ecf20Sopenharmony_ci type: object 688c2ecf20Sopenharmony_ci description: 698c2ecf20Sopenharmony_ci DSI output port node, connected to a panel or a bridge input port" 708c2ecf20Sopenharmony_ci 718c2ecf20Sopenharmony_cirequired: 728c2ecf20Sopenharmony_ci - "#address-cells" 738c2ecf20Sopenharmony_ci - "#size-cells" 748c2ecf20Sopenharmony_ci - compatible 758c2ecf20Sopenharmony_ci - reg 768c2ecf20Sopenharmony_ci - clocks 778c2ecf20Sopenharmony_ci - clock-names 788c2ecf20Sopenharmony_ci - ports 798c2ecf20Sopenharmony_ci 808c2ecf20Sopenharmony_ciunevaluatedProperties: false 818c2ecf20Sopenharmony_ci 828c2ecf20Sopenharmony_ciexamples: 838c2ecf20Sopenharmony_ci - | 848c2ecf20Sopenharmony_ci #include <dt-bindings/interrupt-controller/arm-gic.h> 858c2ecf20Sopenharmony_ci #include <dt-bindings/clock/stm32mp1-clks.h> 868c2ecf20Sopenharmony_ci #include <dt-bindings/reset/stm32mp1-resets.h> 878c2ecf20Sopenharmony_ci #include <dt-bindings/gpio/gpio.h> 888c2ecf20Sopenharmony_ci dsi: dsi@5a000000 { 898c2ecf20Sopenharmony_ci compatible = "st,stm32-dsi"; 908c2ecf20Sopenharmony_ci reg = <0x5a000000 0x800>; 918c2ecf20Sopenharmony_ci clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>; 928c2ecf20Sopenharmony_ci clock-names = "pclk", "ref", "px_clk"; 938c2ecf20Sopenharmony_ci resets = <&rcc DSI_R>; 948c2ecf20Sopenharmony_ci reset-names = "apb"; 958c2ecf20Sopenharmony_ci phy-dsi-supply = <®18>; 968c2ecf20Sopenharmony_ci 978c2ecf20Sopenharmony_ci #address-cells = <1>; 988c2ecf20Sopenharmony_ci #size-cells = <0>; 998c2ecf20Sopenharmony_ci 1008c2ecf20Sopenharmony_ci ports { 1018c2ecf20Sopenharmony_ci #address-cells = <1>; 1028c2ecf20Sopenharmony_ci #size-cells = <0>; 1038c2ecf20Sopenharmony_ci 1048c2ecf20Sopenharmony_ci port@0 { 1058c2ecf20Sopenharmony_ci reg = <0>; 1068c2ecf20Sopenharmony_ci dsi_in: endpoint { 1078c2ecf20Sopenharmony_ci remote-endpoint = <<dc_ep1_out>; 1088c2ecf20Sopenharmony_ci }; 1098c2ecf20Sopenharmony_ci }; 1108c2ecf20Sopenharmony_ci 1118c2ecf20Sopenharmony_ci port@1 { 1128c2ecf20Sopenharmony_ci reg = <1>; 1138c2ecf20Sopenharmony_ci dsi_out: endpoint { 1148c2ecf20Sopenharmony_ci remote-endpoint = <&panel_in>; 1158c2ecf20Sopenharmony_ci }; 1168c2ecf20Sopenharmony_ci }; 1178c2ecf20Sopenharmony_ci }; 1188c2ecf20Sopenharmony_ci 1198c2ecf20Sopenharmony_ci panel-dsi@0 { 1208c2ecf20Sopenharmony_ci compatible = "orisetech,otm8009a"; 1218c2ecf20Sopenharmony_ci reg = <0>; 1228c2ecf20Sopenharmony_ci reset-gpios = <&gpioe 4 GPIO_ACTIVE_LOW>; 1238c2ecf20Sopenharmony_ci power-supply = <&v3v3>; 1248c2ecf20Sopenharmony_ci 1258c2ecf20Sopenharmony_ci port { 1268c2ecf20Sopenharmony_ci panel_in: endpoint { 1278c2ecf20Sopenharmony_ci remote-endpoint = <&dsi_out>; 1288c2ecf20Sopenharmony_ci }; 1298c2ecf20Sopenharmony_ci }; 1308c2ecf20Sopenharmony_ci }; 1318c2ecf20Sopenharmony_ci }; 1328c2ecf20Sopenharmony_ci 1338c2ecf20Sopenharmony_ci... 1348c2ecf20Sopenharmony_ci 135