18c2ecf20Sopenharmony_ciRockchip DWC HDMI TX Encoder
28c2ecf20Sopenharmony_ci============================
38c2ecf20Sopenharmony_ci
48c2ecf20Sopenharmony_ciThe HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
58c2ecf20Sopenharmony_ciwith a companion PHY IP.
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_ciThese DT bindings follow the Synopsys DWC HDMI TX bindings defined in
88c2ecf20Sopenharmony_ciDocumentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
98c2ecf20Sopenharmony_cifollowing device-specific properties.
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118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_ciRequired properties:
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148c2ecf20Sopenharmony_ci- compatible: should be one of the following:
158c2ecf20Sopenharmony_ci		"rockchip,rk3228-dw-hdmi"
168c2ecf20Sopenharmony_ci		"rockchip,rk3288-dw-hdmi"
178c2ecf20Sopenharmony_ci		"rockchip,rk3328-dw-hdmi"
188c2ecf20Sopenharmony_ci		"rockchip,rk3399-dw-hdmi"
198c2ecf20Sopenharmony_ci- reg: See dw_hdmi.txt.
208c2ecf20Sopenharmony_ci- reg-io-width: See dw_hdmi.txt. Shall be 4.
218c2ecf20Sopenharmony_ci- interrupts: HDMI interrupt number
228c2ecf20Sopenharmony_ci- clocks: See dw_hdmi.txt.
238c2ecf20Sopenharmony_ci- clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
248c2ecf20Sopenharmony_ci- ports: See dw_hdmi.txt. The DWC HDMI shall have a single port numbered 0
258c2ecf20Sopenharmony_ci  corresponding to the video input of the controller. The port shall have two
268c2ecf20Sopenharmony_ci  endpoints, numbered 0 and 1, connected respectively to the vopb and vopl.
278c2ecf20Sopenharmony_ci- rockchip,grf: Shall reference the GRF to mux vopl/vopb.
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_ciOptional properties
308c2ecf20Sopenharmony_ci
318c2ecf20Sopenharmony_ci- ddc-i2c-bus: The HDMI DDC bus can be connected to either a system I2C master
328c2ecf20Sopenharmony_ci  or the functionally-reduced I2C master contained in the DWC HDMI. When
338c2ecf20Sopenharmony_ci  connected to a system I2C master this property contains a phandle to that
348c2ecf20Sopenharmony_ci  I2C master controller.
358c2ecf20Sopenharmony_ci- clock-names: See dw_hdmi.txt. The "cec" clock is optional.
368c2ecf20Sopenharmony_ci- clock-names: May contain "cec" as defined in dw_hdmi.txt.
378c2ecf20Sopenharmony_ci- clock-names: May contain "grf", power for grf io.
388c2ecf20Sopenharmony_ci- clock-names: May contain "vpll", external clock for some hdmi phy.
398c2ecf20Sopenharmony_ci- phys: from general PHY binding: the phandle for the PHY device.
408c2ecf20Sopenharmony_ci- phy-names: Should be "hdmi" if phys references an external phy.
418c2ecf20Sopenharmony_ci
428c2ecf20Sopenharmony_ciOptional pinctrl entry:
438c2ecf20Sopenharmony_ci- If you have both a "unwedge" and "default" pinctrl entry, dw_hdmi
448c2ecf20Sopenharmony_ci  will switch to the unwedge pinctrl state for 10ms if it ever gets an
458c2ecf20Sopenharmony_ci  i2c timeout.  It's intended that this unwedge pinctrl entry will
468c2ecf20Sopenharmony_ci  cause the SDA line to be driven low to work around a hardware
478c2ecf20Sopenharmony_ci  errata.
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_ciExample:
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518c2ecf20Sopenharmony_cihdmi: hdmi@ff980000 {
528c2ecf20Sopenharmony_ci	compatible = "rockchip,rk3288-dw-hdmi";
538c2ecf20Sopenharmony_ci	reg = <0xff980000 0x20000>;
548c2ecf20Sopenharmony_ci	reg-io-width = <4>;
558c2ecf20Sopenharmony_ci	ddc-i2c-bus = <&i2c5>;
568c2ecf20Sopenharmony_ci	rockchip,grf = <&grf>;
578c2ecf20Sopenharmony_ci	interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
588c2ecf20Sopenharmony_ci	clocks = <&cru  PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;
598c2ecf20Sopenharmony_ci	clock-names = "iahb", "isfr";
608c2ecf20Sopenharmony_ci	ports {
618c2ecf20Sopenharmony_ci		hdmi_in: port {
628c2ecf20Sopenharmony_ci			#address-cells = <1>;
638c2ecf20Sopenharmony_ci			#size-cells = <0>;
648c2ecf20Sopenharmony_ci			hdmi_in_vopb: endpoint@0 {
658c2ecf20Sopenharmony_ci				reg = <0>;
668c2ecf20Sopenharmony_ci				remote-endpoint = <&vopb_out_hdmi>;
678c2ecf20Sopenharmony_ci			};
688c2ecf20Sopenharmony_ci			hdmi_in_vopl: endpoint@1 {
698c2ecf20Sopenharmony_ci				reg = <1>;
708c2ecf20Sopenharmony_ci				remote-endpoint = <&vopl_out_hdmi>;
718c2ecf20Sopenharmony_ci			};
728c2ecf20Sopenharmony_ci		};
738c2ecf20Sopenharmony_ci	};
748c2ecf20Sopenharmony_ci};
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